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Cisco

Cisco

We securely connect everything to make anything possible.

๐Ÿ“ San Jose, CA

109 Open Positions
10 Active Locations
Posted
Top Employer

About Cisco

Cisco develops networking hardware, software, and telecommunications equipment from its headquarters in San Jose, California. Its product lines include routers, switches, and security solutions, serving various markets such as enterprise, service provider, and data center environments. Engineering disciplines at Cisco encompass hardware design, embedded systems, and software development. Engineers tackle challenges in network security, ASIC design, and system integration, contributing to a vast portfolio of products. With over 75,000 employees, Cisco operates multiple engineering sites globally, ensuring a diverse range of expertise and innovation.

Current Job Openings

109 jobs

All Cisco Job Openings

  • Cisco logo

    ASIC DFT Engineer || DFT/ATPG/MBIST/SCAN/JTAG || 8+ years

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT JTAG ATPG
    View ASIC DFT Engineer || DFT/ATPG/MBIST/SCAN/JTAG || 8+ years
  • Cisco logo

    Hardware Engineer - EMC Design Engineer - 7 to 11 Years - Bangalore

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    EMC RF SignalIntegrity
    View Hardware Engineer - EMC Design Engineer - 7 to 11 Years - Bangalore
  • Cisco logo

    Hardware Engineer - High-speed IO/Testing

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ full-time
    high-speed testing automation
    View Hardware Engineer - High-speed IO/Testing
  • Cisco logo

    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View ASIC Design Verification Engineer
  • Cisco logo

    ASIC Technical Lead - DFT - Silicon One hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Jtag BIST ATPG
    View ASIC Technical Lead - DFT - Silicon One
  • Cisco logo

    Sr Software Engineer - Embedded Data Center

    @ Cisco

    ๐Ÿ“Milpitas, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C++ Python GDB
    View Sr Software Engineer - Embedded Data Center
  • Cisco logo

    Senior Embedded SE | C, Device Driver, Linux ,Multithreading - 7 to 12 years - Bangalore hot job

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C C++ Python
    View Senior Embedded SE | C, Device Driver, Linux ,Multithreading - 7 to 12 years - Bangalore
  • Cisco logo

    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT JTAG ATPG
    View ASIC Engineer
  • Cisco logo

    Software Engineer - C , Embedded, Multithreading , Netconf 4 - 8 years

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C Python gRPC
    View Software Engineer - C , Embedded, Multithreading , Netconf 4 - 8 years
  • Cisco logo

    Hardware Engineer I - United States SCO/S&L ETR

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ full-time
    ASIC System Layout
    View Hardware Engineer I - United States SCO/S&L ETR
  • Cisco logo

    ASIC Design Hardware Engineer - SDC/STA hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SDC STA
    View ASIC Design Hardware Engineer - SDC/STA
  • Cisco logo

    Signal/Power Integrity Hardware Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    signal integrity simulation
    View Signal/Power Integrity Hardware Engineer
  • Cisco logo

    Embedded Wireless Software Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C/C++ Linux networking
    View Embedded Wireless Software Engineer
  • Cisco logo

    ASIC Engineering Technical Leader hot job

    @ Cisco

    ๐Ÿ“Thalwil, Switzerland ๐Ÿ‡จ๐Ÿ‡ญ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    CMOS Cadence SerDes
    View ASIC Engineering Technical Leader
  • Cisco logo

    PCB Technical Leader

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    PCB FMEA DOE
    View PCB Technical Leader
  • Cisco logo

    Hardware Engineer hot job

    @ Cisco

    ๐Ÿ“San Francisco, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Ethernet PoE schematics
    View Hardware Engineer
  • Cisco logo

    ASIC Engineer

    @ Cisco

    ๐Ÿ“Zhubei City, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SRAM TCAM Cadence
    View ASIC Engineer
  • Cisco logo

    Hardware Engineer - FPGA hot job

    @ Cisco

    ๐Ÿ“Milpitas, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Verilog ASIC
    View Hardware Engineer - FPGA
  • Cisco logo

    Hardware Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC Python C++
    View Hardware Engineer
  • Cisco logo

    ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits | 10+ years hot job

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    analog photonics modulator
    View ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits | 10+ years
  • Cisco logo

    Senior Embedded Software Engineer hot job

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C C++ Python
    View Senior Embedded Software Engineer
  • Cisco logo

    ASIC Design Verfication Engineer II - United States

    @ Cisco

    ๐Ÿ“Carlsbad, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC VLSI Verilog
    View ASIC Design Verfication Engineer II - United States
  • Cisco logo

    Senior ASIC Physical Design CAD Engineer

    @ Cisco

    ๐Ÿ“Tel-Aviv, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    VLSI CAD EDA
    View Senior ASIC Physical Design CAD Engineer
  • Cisco logo

    Software Engineer, Embedded hot job

    @ Cisco

    ๐Ÿ“Milpitas, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C/C++ Python ASICs
    View Software Engineer, Embedded
  • Cisco logo

    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Emulation UVM
    View ASIC Engineer
  • Cisco logo

    Analog Design Student - Israel - ETR

    @ Cisco

    ๐Ÿ“Kayseri, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ internship
    analog mixed-signal CMOS
    View Analog Design Student - Israel - ETR
  • Cisco logo

    ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead hot job

    @ Cisco

    ๐Ÿ“Tempe, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC High-Speed Sigrity
    View ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead
  • Cisco logo

    Signal/Power Integrity Hardware Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    signal integrity PCB
    View Signal/Power Integrity Hardware Engineer
  • Cisco logo

    Embedded Software Engineering Technical Leader hot job

    @ Cisco

    ๐Ÿ“Milpitas, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C++ Python FPGA
    View Embedded Software Engineering Technical Leader
  • Cisco logo

    Hardware Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC Ethernet PoE
    View Hardware Engineer
  • Cisco logo

    Hardware Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    PCB Python SCPI
    View Hardware Engineer
  • Cisco logo

    Hardware Engineer- HW Board Design

    @ Cisco

    ๐Ÿ“Kayseri, Turkey ๐Ÿ‡น๐Ÿ‡ท
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    PCB silicon AI
    View Hardware Engineer- HW Board Design
  • Cisco logo

    Embedded Linux Software Engineer โ€“ Networking & Device Drivers with C/C++ |5-8 Years

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Linux C++ I2C
    View Embedded Linux Software Engineer โ€“ Networking & Device Drivers with C/C++ |5-8 Years
  • Cisco logo

    ASIC Engineer :: Physical Design

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Physical Timing
    View ASIC Engineer :: Physical Design
  • Cisco logo

    ASIC Engineering Technical Leader - DFT

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View ASIC Engineering Technical Leader - DFT
  • Cisco logo

    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC layout SerDes
    View ASIC Engineer
  • Cisco logo

    ASIC Engineer

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    packaging integration materials
    View ASIC Engineer
  • Cisco logo

    ASIC Engineering Technical Leader hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC validation networking
    View ASIC Engineering Technical Leader
  • Cisco logo

    FPGA HW Engineering Technical Leader hot job

    @ Cisco

    ๐Ÿ“Durham County, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Xilinx Altera
    View FPGA HW Engineering Technical Leader
  • Cisco logo

    Senior Embedded Software Engineer | C, Device Driver, Linux , SPI/I2C/PCI - 8 to 12 years

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C C++ Python
    View Senior Embedded Software Engineer | C, Device Driver, Linux , SPI/I2C/PCI - 8 to 12 years
  • Cisco logo

    ASIC Engineering Design Technical Leader

    @ Cisco

    ๐Ÿ“Kayseri, Turkey ๐Ÿ‡น๐Ÿ‡ท
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    UVM verification MATLAB
    View ASIC Engineering Design Technical Leader
  • Cisco logo

    PCB Technical Leader

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    PCB FMEA DOE
    View PCB Technical Leader
  • Cisco logo

    Embedded Software Engineer - C, Linux, Networking

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C C++ Python
    View Embedded Software Engineer - C, Linux, Networking
  • Cisco logo

    Junior ASIC Engineer - Israel - ETR

    @ Cisco

    ๐Ÿ“Kayseri, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š junior
    โฑ๏ธŽ full-time
    ASIC design verification
    View Junior ASIC Engineer - Israel - ETR
  • Cisco logo

    Senior Embedded SE | C, Device Driver, Linux, Networking - 7+ years - Bangalore hot job

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C C++ Python
    View Senior Embedded SE | C, Device Driver, Linux, Networking - 7+ years - Bangalore
  • Cisco logo

    Senior Embedded SE | C, Device Driver, Linux, Networking - 7+ years - Bangalore

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C Python Linux
    View Senior Embedded SE | C, Device Driver, Linux, Networking - 7+ years - Bangalore
  • Cisco logo

    Analog/mixed-signal IC Design Engineer - Acacia hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    transceivers simulation PLL
    View Analog/mixed-signal IC Design Engineer - Acacia
  • Cisco logo

    ASIC Design Engineer, STA hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Verilog SystemVerilog STA
    View ASIC Design Engineer, STA
  • Cisco logo

    ASIC Engineer

    @ Cisco

    ๐Ÿ“Yerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Fusion Innovus
    View ASIC Engineer
  • Cisco logo

    ASIC Engineering Program Manager hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC silicon FPGA
    View ASIC Engineering Program Manager
  • Cisco logo

    FPGA Design Technical Leader- Ethernet,PCIe, System Verilog, Xilinx- 12+ Years hot job

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Xilinx Verilog
    View FPGA Design Technical Leader- Ethernet,PCIe, System Verilog, Xilinx- 12+ Years
  • Cisco logo

    ASIC DFT Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT Jtag Scan
    View ASIC DFT Engineer
  • Cisco logo

    Hardware Engineer- - BLR , 4 to 8 yrs

    @ Cisco

    ๐Ÿ“Bangalore South, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    power analog topology
    View Hardware Engineer- - BLR , 4 to 8 yrs
  • Cisco logo

    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM Perl
    View ASIC Design Verification Engineer
  • Cisco logo

    ASIC Link Modeling Technical Leader hot job

    @ Cisco

    ๐Ÿ“Carlsbad, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Python C++ MATLAB
    View ASIC Link Modeling Technical Leader
  • Cisco logo

    ASIC Design Engineer Technical Lead hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Verilog RTL
    View ASIC Design Engineer Technical Lead
  • Cisco logo

    ASIC Verification Engineer - CAG - Taiwan, Taipei

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM ASIC
    View ASIC Verification Engineer - CAG - Taiwan, Taipei
  • Cisco logo

    ASIC Design Verification Engineering Technical Leader hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SystemVerilog UVM
    View ASIC Design Verification Engineering Technical Leader
  • Cisco logo

    ASIC DFT Engineer || DFT/ATPG/MBIST/SCAN/JTAG || 8+ years

    @ Cisco

    ๐Ÿ“Bangalore South, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT JTAG ATPG
    View ASIC DFT Engineer || DFT/ATPG/MBIST/SCAN/JTAG || 8+ years
  • Cisco logo

    Hardware Engineer

    @ Cisco

    ๐Ÿ“Milpitas, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    validation networking Python
    View Hardware Engineer
  • Cisco logo

    Analog/mixed-signal IC Design Developer - Acacia - hot job

    @ Cisco

    ๐Ÿ“Ottawa, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    transceivers serialization PLLs
    View Analog/mixed-signal IC Design Developer - Acacia -
  • Cisco logo

    ASIC STA Engineer

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Verilog SystemVerilog STA
    View ASIC STA Engineer
  • Cisco logo

    ASIC Technical Leader- DFT hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT JTAG ATPG
    View ASIC Technical Leader- DFT
  • Cisco logo

    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM ASIC
    View ASIC Design Verification Engineer
  • Cisco logo

    ASIC Engineering Technical Lead

    @ Cisco

    ๐Ÿ“Bangalore South, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC UVM SystemVerilog
    View ASIC Engineering Technical Lead
  • Cisco logo

    ASIC Engineer

    @ Cisco

    ๐Ÿ“Albuquerque, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Physical Synthesis
    View ASIC Engineer
  • Cisco logo

    Analog/mixed-signal IC Design Developer hot job

    @ Cisco

    ๐Ÿ“Ottawa, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    IC CMOS ESD
    View Analog/mixed-signal IC Design Developer
  • Cisco logo

    Embedded Software Engineer Wireless

    @ Cisco

    ๐Ÿ“Bรฆrum, Norway ๐Ÿ‡ณ๐Ÿ‡ด
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Wi-Fi Bluetooth C
    View Embedded Software Engineer Wireless
  • Cisco logo

    Senior RTL Design Engineer

    @ Cisco

    ๐Ÿ“Yerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Verilog SystemVerilog Python
    View Senior RTL Design Engineer
  • Cisco logo

    Hardware Engineer- - BLR , 8 to 15 yrs

    @ Cisco

    ๐Ÿ“Bangalore South, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    power electronics analog
    View Hardware Engineer- - BLR , 8 to 15 yrs
  • Cisco logo

    Senior RTL Design Engineer

    @ Cisco

    ๐Ÿ“Yerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Verilog SystemVerilog AMBA
    View Senior RTL Design Engineer
  • Cisco logo

    ASIC Engineering Technical Leader hot job

    @ Cisco

    ๐Ÿ“Yerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Verilog SystemVerilog
    View ASIC Engineering Technical Leader
  • Cisco logo

    ASIC High Speed AMS Technical Leader hot job

    @ Cisco

    ๐Ÿ“Carlsbad, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    AMS silicon photonics
    View ASIC High Speed AMS Technical Leader
  • Cisco logo

    Embedded Software Engineering Technical Leader hot job

    @ Cisco

    ๐Ÿ“Bangalore South, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C C++ Python
    View Embedded Software Engineering Technical Leader
  • Cisco logo

    Technical Leader, Distributed Quantum Computing and Quantum Networking Theorist hot job

    @ Cisco

    ๐Ÿ“Santa Monica, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    quantum networking entanglement
    View Technical Leader, Distributed Quantum Computing and Quantum Networking Theorist
  • Cisco logo

    Software Engineer- Embedded Developer- C/C++

    @ Cisco

    ๐Ÿ“Bangalore South, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C/C++ Linux RTOS
    View Software Engineer- Embedded Developer- C/C++
  • Cisco logo

    Embedded Software Engineer

    @ Cisco

    ๐Ÿ“Bรฆrum, Norway ๐Ÿ‡ณ๐Ÿ‡ด
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C++ Python Linux
    View Embedded Software Engineer
  • Cisco logo

    ASIC Packaging Development Technical Leader

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    packaging assembly integration
    View ASIC Packaging Development Technical Leader
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    ASIC DFT STA Technical Lead hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    STA DFT SDC
    View ASIC DFT STA Technical Lead
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    ASIC Engineering Technical Leader hot job

    @ Cisco

    ๐Ÿ“Bangalore South, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC RTL Verilog
    View ASIC Engineering Technical Leader
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    ASIC DFx & Test Architect Lead hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC RTL DFx
    View ASIC DFx & Test Architect Lead
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    ASIC DFT STA Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    STA SDC CDC
    View ASIC DFT STA Engineer
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    ASIC Design Verification Technical Leader hot job

    @ Cisco

    ๐Ÿ“Carlsbad, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View ASIC Design Verification Technical Leader
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    Hardware Engineer

    @ Cisco

    ๐Ÿ“Bรฆrum, Norway ๐Ÿ‡ณ๐Ÿ‡ด
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    schematic RF sensors
    View Hardware Engineer
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    ASIC Physical Design Engineer

    @ Cisco

    ๐Ÿ“Yerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC PnR STA
    View ASIC Physical Design Engineer
  • Cisco logo

    ASIC Design Verification Engineer - 5 years to 13Years - Bangalore

    @ Cisco

    ๐Ÿ“Bangalore South, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    emulation verification debug
    View ASIC Design Verification Engineer - 5 years to 13Years - Bangalore
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    Senior EDA Tools and Systems Support Hardware Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    EDA CAD PBS
    View Senior EDA Tools and Systems Support Hardware Engineer
  • Cisco logo

    ASIC Physical Design Principal Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š principal
    โฑ๏ธŽ full-time
    RTL2GDSII Optimization Innovus
    View ASIC Physical Design Principal Engineer
  • Cisco logo

    Senior ASIC Physical Design Engineering Technical Lead hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC RTL GDSII
    View Senior ASIC Physical Design Engineering Technical Lead
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    ASIC Verification Engineer

    @ Cisco

    ๐Ÿ“Cairo, Egypt ๐Ÿ‡ช๐Ÿ‡ฌ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC SystemVerilog UVM
    View ASIC Verification Engineer
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    ASIC Engineering Technical Leader- DFT hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Jtag BIST Verilog
    View ASIC Engineering Technical Leader- DFT
  • Cisco logo

    ASIC Verification Engineer - 5 to 13 years - Bangalore

    @ Cisco

    ๐Ÿ“Bangalore South, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC EDA verification
    View ASIC Verification Engineer - 5 to 13 years - Bangalore
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    Hardware Engineer - 2010267 hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    scripting automation SOC
    View Hardware Engineer - 2010267
  • Cisco logo

    Hardware Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Python LabVIEW I2C
    View Hardware Engineer
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    ASIC DFT Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT Jtag Scan
    View ASIC DFT Engineer
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    Hardware Engineer

    @ Cisco

    ๐Ÿ“Bรฆrum, Norway ๐Ÿ‡ณ๐Ÿ‡ด
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Python testing automation
    View Hardware Engineer
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    ASIC Engineering Technical Leader - CDC

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC RTL CDC
    View ASIC Engineering Technical Leader - CDC
  • Cisco logo

    ASIC Design Verification Engineer, Technical Leader hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SystemVerilog UVM
    View ASIC Design Verification Engineer, Technical Leader
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    FPGA Design Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Verilog VHDL
    View FPGA Design Engineer
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    Hardware Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Verilog VHDL
    View Hardware Engineer
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    ASIC Packaging Signal/Power Integrity Hardware Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Signal Integrity Power
    View ASIC Packaging Signal/Power Integrity Hardware Engineer
  • Cisco logo

    ASIC Packaging Signal/Power Integrity Hardware Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Sigrity HFSS
    View ASIC Packaging Signal/Power Integrity Hardware Engineer
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    ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Signal Integrity ASIC
    View ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead
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    Hardware Engineer hot job

    @ Cisco

    ๐Ÿ“Austin, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
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    design validation PCIe
    View Hardware Engineer
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    ASIC Engineer hot job

    @ Cisco

    ๐Ÿ“Mulshi, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
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    RTL GDSII STA
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    ASIC Technical Lead- DFT

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
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    ASIC Packaging Signal/Power Integrity Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Signal Integrity Simulation
    View ASIC Packaging Signal/Power Integrity Engineer
  • Cisco logo

    ASIC Packaging Signal/Power Integrity Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
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    View ASIC Packaging Signal/Power Integrity Engineer
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    ASIC Physical Design Engineer

    @ Cisco

    ๐Ÿ“Kayseri, Turkey ๐Ÿ‡น๐Ÿ‡ท
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    VLSI Synthesis Optimization
    View ASIC Physical Design Engineer
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    ASIC Engineer

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    ๐Ÿ“Mulshi, India ๐Ÿ‡ฎ๐Ÿ‡ณ
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    โฑ๏ธŽ full-time
    ASIC UVM SystemVerilog
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  • Expired
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    Senior Director, Sourcing & Supplier Management โ€“ ASIC

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    semiconductor sourcing OSAT
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    View Senior Director, Sourcing & Supplier Management โ€“ ASIC
  • Expired
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    Hardware Engineer

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Ethernet PoE schematics
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    View Hardware Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Zhubei City, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
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  • Expired
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    Senior Embedded Software Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C/C++ Python Linux
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    View Senior Embedded Software Engineer
  • Expired
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    Senior ASIC Physical Design Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
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  • Expired
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    ASIC Physical Design Engineer

    @ Cisco

    ๐Ÿ“Yerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC GDSII RTL
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    View ASIC Physical Design Engineer
  • Expired
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    Embedded Software Engineer - C Program/I2C,UART,SPI,PCIe/BSP/Boot loader - 8 to 12 years - Bangalore

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C C++ Python
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    View Embedded Software Engineer - C Program/I2C,UART,SPI,PCIe/BSP/Boot loader - 8 to 12 years - Bangalore
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    Technical Leader- Quantum Networking Hardware Engineer hot job

    @ Cisco

    ๐Ÿ“Santa Monica, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
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    View Technical Leader- Quantum Networking Hardware Engineer
  • Expired
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    ASIC Verification Engineer

    @ Cisco

    ๐Ÿ“Cairo, Egypt ๐Ÿ‡ช๐Ÿ‡ฌ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SystemVerilog UVM
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    View ASIC Verification Engineer
  • Expired
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    ASIC Physical Design Technical Lead

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
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    View ASIC Physical Design Technical Lead
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    Senior ASIC Physical Design Technical Lead hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
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    View Senior ASIC Physical Design Technical Lead
  • Expired
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    Embedded Software Engineer

    @ Cisco

    ๐Ÿ“Bรฆrum, Norway ๐Ÿ‡ณ๐Ÿ‡ด
    ๐Ÿ“Š entry-level
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    embedded Linux USB
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  • Expired
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    ASIC Engineering Technical Leader

    @ Cisco

    ๐Ÿ“Tel-Aviv, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š senior
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  • Expired
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    Embedded Software Test Engineer

    @ Cisco

    ๐Ÿ“Bรฆrum, Norway ๐Ÿ‡ณ๐Ÿ‡ด
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
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  • Expired
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    FPGA Developer

    @ Cisco

    ๐Ÿ“Bรฆrum, Norway ๐Ÿ‡ณ๐Ÿ‡ด
    ๐Ÿ“Š mid-level
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  • Expired
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    Hardware Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
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    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
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  • Expired
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    Senior Hardware Engineer-

    @ Cisco

    ๐Ÿ“Maitland, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
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    Distinguished Hardware Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
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    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
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    ASIC Physical Design Technical Lead

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
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  • Expired
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    ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
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  • Expired
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    ASIC Engineering Technical Leader

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
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    Analog/mixed-signal IC Design Engineer - Acacia hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
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    Embedded Software Engineering Technical Leader hot job

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    ๐Ÿ“Milpitas, United States ๐Ÿ‡บ๐Ÿ‡ธ
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  • Expired
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    ASIC Design Verification Engineering Technical Leader

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    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
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    ASIC Design Hardware Engineer - SDC/STA

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
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    Embedded Software Technical Leader - Acacia hot job

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    FPGA HW Engineering Technical Leader hot job

    @ Cisco

    ๐Ÿ“San Francisco, United States ๐Ÿ‡บ๐Ÿ‡ธ
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Zhubei City, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
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    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
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    Senior Software Engineer, Wireless Radio / Firmware - 7+ yrs | BLR

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
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    Hardware Engineer II - United States

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š entry-level
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    ASIC Engineering Technical Leader

    @ Cisco

    ๐Ÿ“Bangalore South, India ๐Ÿ‡ฎ๐Ÿ‡ณ
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    ASIC Engineering Design Verification Leader

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    ๐Ÿ“Mulshi, India ๐Ÿ‡ฎ๐Ÿ‡ณ
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    Embedded Wireless Software Engineer โ€“

    @ Cisco

    ๐Ÿ“Bangalore South, India ๐Ÿ‡ฎ๐Ÿ‡ณ
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    @ Cisco

    ๐Ÿ“Bangalore South, India ๐Ÿ‡ฎ๐Ÿ‡ณ
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    Hardware Engineerโ€“ High-Speed Board Design, Cisco silicon One

    @ Cisco

    ๐Ÿ“Kayseri, Turkey ๐Ÿ‡น๐Ÿ‡ท
    ๐Ÿ“Š mid-level
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    ASIC Layout Engineer - Analog, High speed IP - 8 to 11 years - Bangalore

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    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
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    ASIC Engineer

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    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
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    Senior Engineering Manager โ€“ Wireless Radio Firmware hot job

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    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
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    Technical Lead โ€“ Embedded Software, Wireless Access Point

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    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    embedded C/C++ Linux
    View details
    View Technical Lead โ€“ Embedded Software, Wireless Access Point
  • Expired
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    ASIC DFT Engineer - 4 to 8 yrs

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Jtag BIST ATPG
    View details
    View ASIC DFT Engineer - 4 to 8 yrs
  • Expired
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    ASIC Design Verification Engineer - 5 years to 13Years - Bangalore

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    emulation verification Cadence
    View details
    View ASIC Design Verification Engineer - 5 years to 13Years - Bangalore
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineering Technical Leader | RTL development | Exp - 12+ years

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC RTL SystemVerilog
    View details
    View ASIC Engineering Technical Leader | RTL development | Exp - 12+ years
  • Expired
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    Hardware Engineer hot job

    @ Cisco

    ๐Ÿ“Milpitas, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    I2C SPI PCI
    View details
    View Hardware Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Hyderabad, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Physcial Timing
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineering Technical Leader

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SDC STA
    View details
    View ASIC Engineering Technical Leader
  • Expired
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    Hardware Engineer

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Ethernet PoE schematics
    View details
    View Hardware Engineer
  • Expired
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    ASIC Engineering Technical Leader hot job

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC RTL Verilog
    View details
    View ASIC Engineering Technical Leader
  • Expired
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    Hardware Engineer || Electronic Design Validation Tests || Exp - 5 to 8 Years

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    EDVT PCBA Python
    View details
    View Hardware Engineer || Electronic Design Validation Tests || Exp - 5 to 8 Years
  • Expired
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    ASIC Engineering Technical Leader- STA

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Synthesis Verification
    View details
    View ASIC Engineering Technical Leader- STA
  • Expired
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    ASIC Engineering Technical Leader hot job

    @ Cisco

    ๐Ÿ“Carlsbad, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC DFT RTL
    View details
    View ASIC Engineering Technical Leader
  • Expired
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    Hardware Engineer Trainee_Technical Graduate Apprentice - India UHR

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ internship
    ASIC PCB DFM
    View details
    View Hardware Engineer Trainee_Technical Graduate Apprentice - India UHR
  • Expired
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    Embedded Software Engineer - 4 to 8 yrs

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C C++ Python
    View details
    View Embedded Software Engineer - 4 to 8 yrs
  • Expired
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    ASIC Design Verfication Engineer II - United States

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC VLSI Rtl
    View details
    View ASIC Design Verfication Engineer II - United States
  • Expired
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    ASIC Engineering Physical Design Leader hot job

    @ Cisco

    ๐Ÿ“Mulshi, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC GDSII TCL
    View details
    View ASIC Engineering Physical Design Leader
  • Expired
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    ASIC Package Engineer

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    simulation ABAQUS ANSYS
    View details
    View ASIC Package Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Zhubei City, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Tcl Verilog Linux
    View details
    View ASIC Engineer
  • Expired
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    Hardware Engineer I - United States

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ internship
    ASIC Validation Automation
    View details
    View Hardware Engineer I - United States
  • Expired
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    ASIC - Signal and Power Integrity Technical Leader - 12 to 17 Years - Bangalore/Chennai

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SerDes Power
    View details
    View ASIC - Signal and Power Integrity Technical Leader - 12 to 17 Years - Bangalore/Chennai
  • Expired
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    Hardware Engineer

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ full-time
    coordination communication documentation
    View details
    View Hardware Engineer
  • Expired
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    Senior Technical Lead, Signal/Power Integrity Hardware Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    signal integrity PCIe
    View details
    View Senior Technical Lead, Signal/Power Integrity Hardware Engineer
  • Expired
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    Embedded Software Engineer hot job

    @ Cisco

    ๐Ÿ“CA, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C C++ Python
    View details
    View Embedded Software Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C++ Python SystemVerilog
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC RTL Power
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC Emulation SystemVerilog
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC RTL verification
    View details
    View ASIC Engineer
  • Expired
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    ASIC DFT Technical Lead hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT RTL JTAG
    View details
    View ASIC DFT Technical Lead
  • Expired
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    Embedded Software Engineer - Network L2/L3 hot job

    @ Cisco

    ๐Ÿ“Milpitas, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C++ Python GDB
    View details
    View Embedded Software Engineer - Network L2/L3
  • Expired
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    ASIC Physical Design Technical Lead hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC EDA GDSII
    View details
    View ASIC Physical Design Technical Lead
  • Expired
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    ASIC Engineering Technical Leader

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC DFT FPGA
    View details
    View ASIC Engineering Technical Leader
  • Expired
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    Embedded Software Engineer hot job

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C C++ Python
    View details
    View Embedded Software Engineer
  • Expired
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    ASIC STA Engineer hot job

    @ Cisco

    ๐Ÿ“Austin, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Verilog SystemVerilog STA
    View details
    View ASIC STA Engineer
  • Expired
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    ASIC STA Engineer hot job

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC Verilog STA
    View details
    View ASIC STA Engineer
  • Expired
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    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM ASIC
    View details
    View ASIC Design Verification Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Ahmedabad, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Timing Floorplanning
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC P&R timing
    View details
    View ASIC Engineer
  • Expired
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    ASIC Design Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Verilog SystemVerilog
    View details
    View ASIC Design Engineer
  • Expired
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    ASIC Engineer - SDC

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SDC STA
    View details
    View ASIC Engineer - SDC
  • Expired
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    ASIC DFT Engineer - 4 to 8 yrs

    @ Cisco

    ๐Ÿ“Greater Hyderabad Area, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View details
    View ASIC DFT Engineer - 4 to 8 yrs
  • Expired
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    ASIC DFT Engineer - 4 to 8 yrs

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View details
    View ASIC DFT Engineer - 4 to 8 yrs
  • Expired
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    ASIC DV Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC UVM SystemVerilog
    View details
    View ASIC DV Engineer
  • Expired
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    ASIC Design Verification Engineer | 7+ Yrs | BLR hot job

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC UVM SystemVerilog
    View details
    View ASIC Design Verification Engineer | 7+ Yrs | BLR
  • Expired
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    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View details
    View ASIC Design Verification Engineer
  • Expired
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    Senior ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“Caesarea, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    UVM verification MATLAB
    View details
    View Senior ASIC Design Verification Engineer
  • Expired
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    Senior ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“Tel Aviv-Yafo, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC UVM verification
    View details
    View Senior ASIC Design Verification Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Timing TCL
    View details
    View ASIC Engineer
  • Expired
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    ASIC Verification Engineer - CAG - Taiwan, Taipei

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM Verification
    View details
    View ASIC Verification Engineer - CAG - Taiwan, Taipei
  • Expired
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    ASIC Reliability Engineer

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    semiconductor reliability testing
    View details
    View ASIC Reliability Engineer
  • Expired
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    ASIC Design Engineering Technical Lead hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Verilog SystemVerilog
    View details
    View ASIC Design Engineering Technical Lead
  • Expired
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    ASIC Design Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Verilog SystemVerilog
    View details
    View ASIC Design Engineer
  • Expired
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    Layout Analog Design Engineer

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    IC Cadence DRC
    View details
    View Layout Analog Design Engineer
  • Expired
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    Chip Level STA ASIC Engineer

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC CAD PnR
    View details
    View Chip Level STA ASIC Engineer
  • Expired
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    ASIC Design Engineer, STA

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Verilog SystemVerilog STA
    View details
    View ASIC Design Engineer, STA
  • Expired
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    ASIC Engineer hot job

    @ Cisco

    ๐Ÿ“Greater Hyderabad Area, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT Jtag Scan
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View details
    View ASIC Engineer
  • Expired
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    Principal Embedded Software Engineer hot job

    @ Cisco

    ๐Ÿ“CA, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š principal
    โฑ๏ธŽ full-time
    C C++ Python
    View details
    View Principal Embedded Software Engineer
  • Expired
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    ASIC Engineer - SDC hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SDC Verilog
    View details
    View ASIC Engineer - SDC
  • Expired
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    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Verilog SystemVerilog
    View details
    View ASIC Design Verification Engineer
  • Expired
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    ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM ASIC
    View details
    View ASIC Design Verification Engineer
  • Expired
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    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC SystemVerilog UVM
    View details
    View ASIC Design Verification Engineer
  • Expired
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    ASIC Digital Design Engineer

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC Verilog DFT
    View details
    View ASIC Digital Design Engineer
  • Expired
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    ASIC Hardware Test Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC VLSI test
    View details
    View ASIC Hardware Test Engineer
  • Expired
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    Embedded Software Engineer โ€“ hot job

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C++ NPU EVPN
    View details
    View Embedded Software Engineer โ€“
  • Expired
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    Sr. ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM Ethernet
    View details
    View Sr. ASIC Design Verification Engineer
  • Expired
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    ASIC DFT Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View details
    View ASIC DFT Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC TCL Python
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Greater Hyderabad Area, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View details
    View ASIC Engineer
  • Expired
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    ASIC Verification Engineer - Acacia hot job

    @ Cisco

    ๐Ÿ“Austin, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SystemVerilog UVM
    View details
    View ASIC Verification Engineer - Acacia
  • Expired
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    ASIC Verification Engineer - Acacia hot job

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SystemVerilog UVM
    View details
    View ASIC Verification Engineer - Acacia
  • Expired
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    Embedded Software Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C C++ Python
    View details
    View Embedded Software Engineer
  • Expired
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    ASIC Physical Design Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Timing Primetime Synthesis
    View details
    View ASIC Physical Design Engineer
  • Expired
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    Senior Software Engineer - Embedded Devices hot job

    @ Cisco

    ๐Ÿ“Durham, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C C++ Python
    View details
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    Software Engineer - Embedded Devices hot job

    @ Cisco

    ๐Ÿ“Durham, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    embedded automation CI/CD
    View details
    View Software Engineer - Embedded Devices
  • Expired
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    Embedded Software Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C C++ Python
    View details
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  • Expired
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    Senior RTL Engineer

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Verilog SystemVerilog AMBA
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  • Expired
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    ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View details
    View ASIC Design Verification Engineer
  • Expired
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    Senior Embedded Software Engineer hot job

    @ Cisco

    ๐Ÿ“CA, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C FPGA Sonic
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  • Expired
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    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC UVM SystemVerilog
    View details
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  • Expired
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    ASIC Design Engineer | Exp. 8+ years hot job

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC RTL Verilog
    View details
    View ASIC Design Engineer | Exp. 8+ years
  • Expired
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    Embedded Software Engineer

    @ Cisco

    ๐Ÿ“CA, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C C++ Python
    View details
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  • Expired
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    Software Engineer hot job

    @ Cisco

    ๐Ÿ“CA, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C++ Python SDK
    View details
    View Software Engineer
  • Expired
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    Senior Embedded Software Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C++ Python Linux
    View details
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  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC RTL Verilog
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer_SoC Design Internship

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ internship
    VLSI ASIC Python
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  • Expired
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    ASIC Hardware Test Engineer - Hybrid hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC VLSI C
    View details
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  • Expired
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    ASIC Physical Design Engineer

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC synthesis routing
    View details
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  • Expired
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    ASIC DFT Engineer/ ASIC Engineer

    @ Cisco

    ๐Ÿ“Greater Hyderabad Area, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š junior
    โฑ๏ธŽ full-time
    Jtag BIST EDA
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  • Expired
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    ASIC DFT Engineer/ ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š junior
    โฑ๏ธŽ full-time
    DFT Jtag Scan
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  • Expired
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    ASIC Design Verification Technical Leader hot job

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC UVM SystemVerilog
    View details
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  • Expired
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    ASIC Design Engineering Technical Leader

    @ Cisco

    ๐Ÿ“Caesarea, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    RTL UVM Verification
    View details
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  • Expired
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    ASIC DFT Engineer

    @ Cisco

    ๐Ÿ“Greater Hyderabad Area, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT Jtag Atpg
    View details
    View ASIC DFT Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Ahmedabad, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Jtag ATPG Tcl
    View details
    View ASIC Engineer
  • Expired
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    Software Embedded Software Developer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š junior
    โฑ๏ธŽ full-time
    C++ Linux RTOS
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  • Expired
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    SR ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM ASIC
    View details
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  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC RTL GDS
    View details
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  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Timing Verification
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  • Expired
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    ASIC Engineer - Israel - ETR

    @ Cisco

    ๐Ÿ“Caesarea, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    analog mixed-signal CMOS
    View details
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  • Expired
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    ASIC Digital Design Engineer

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC Verilog Python
    View details
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  • Expired
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    ASIC Digital Design Engineer

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Verilog SystemVerilog Python
    View details
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  • Expired
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    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC SystemVerilog UVM
    View details
    View ASIC Design Verification Engineer
  • Expired
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    Embedded Software Engineer hot job

    @ Cisco

    ๐Ÿ“CA, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C FPGA I2C
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  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Greater Hyderabad Area, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View details
    View ASIC Engineer
  • Expired
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    ASIC Design Verification Emulation Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM emulation
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  • Expired
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    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SystemVerilog UVM
    View details
    View ASIC Design Verification Engineer
  • Expired
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    ASIC DFT Engineer - 4 to 8 Yrs

    @ Cisco

    ๐Ÿ“Greater Hyderabad Area, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View details
    View ASIC DFT Engineer - 4 to 8 Yrs
  • Expired
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    ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View details
    View ASIC Design Verification Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC Power Timing
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer Graduate- ETR- Israel

    @ Cisco

    ๐Ÿ“Caesarea, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ full-time
    ASIC RTL analog
    View details
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  • Expired
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    Embedded Engineering Technical Leader

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Linux C++ Python
    View details
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  • Expired
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    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM ASIC
    View details
    View ASIC Design Verification Engineer
  • Expired
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    ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM debugging
    View details
    View ASIC Design Verification Engineer
  • Expired
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    ASIC Design Engineer | Exp 8+ Years

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC RTL Verilog
    View details
    View ASIC Design Engineer | Exp 8+ Years
  • Expired
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    Embedded Software Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C C++ Python
    View details
    View Embedded Software Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Barcelona, Spain ๐Ÿ‡ช๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC RTL GDS
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Synopsys Cadence
    View details
    View ASIC Engineer
  • Expired
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    ASIC DFT Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Jtag BIST ATPG
    View details
    View ASIC DFT Engineer
  • Expired
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    Embedded Software Engineer - C, Linux

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C C++ Python
    View details
    View Embedded Software Engineer - C, Linux
  • Expired
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    PHY Firmware Engineer

    @ Cisco

    ๐Ÿ“Caesarea, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    firmware PHY debugging
    View details
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  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Emulation C++ SystemVerilog
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Verilog SystemVerilog Python
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC SystemVerilog UVM
    View details
    View ASIC Engineer
  • Expired
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    Senior ASIC Engineer - SDC hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SDC RTL
    View details
    View Senior ASIC Engineer - SDC
  • Expired
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    ASIC DFT Engineer - 8 to 12 yrs hot job

    @ Cisco

    ๐Ÿ“Greater Hyderabad Area, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
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    View ASIC DFT Engineer - 8 to 12 yrs
  • Expired
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    ASIC DFT Engineer - 8 to 12 yrs

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View details
    View ASIC DFT Engineer - 8 to 12 yrs
  • Expired
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    ASIC Design Engineer

    @ Cisco

    ๐Ÿ“Tel Aviv-Yafo, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    RTL UVM Verilog
    View details
    View ASIC Design Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC verification synthesis
    View details
    View ASIC Engineer
  • Expired
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    Software Engineer - Silicon One Compiler Team

    @ Cisco

    ๐Ÿ“Tel Aviv-Yafo, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C++ LLVM Python
    View details
    View Software Engineer - Silicon One Compiler Team
  • Expired
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    ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Verilog UVM RTL
    View details
    View ASIC Design Verification Engineer
  • Expired
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    ASIC DFT SDC Development Engineer

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT SDC STA
    View details
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  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC PnR STA
    View details
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  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View details
    View ASIC Engineer
  • Expired
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    Software Engineer hot job

    @ Cisco

    ๐Ÿ“CA, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C++ Python QoS
    View details
    View Software Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    EDA Tcl Python
    View details
    View ASIC Engineer
  • Expired
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    Hardware FPGA Design Engineer - Acacia hot job

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Verilog Python
    View details
    View Hardware FPGA Design Engineer - Acacia
  • Expired
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    ASIC Engineer hot job

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    IP PDK Synopsys
    View details
    View ASIC Engineer
  • Expired
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    ASIC DFT Engineer

    @ Cisco

    ๐Ÿ“Hyderabad, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT Jtag Scan
    View details
    View ASIC DFT Engineer
  • Expired
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    ASIC Logic Design Engineering Technical Leader

    @ Cisco

    ๐Ÿ“Caesarea, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    RTL UVM CDC
    View details
    View ASIC Logic Design Engineering Technical Leader
  • Expired
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    ASIC DFT Engineer

    @ Cisco

    ๐Ÿ“Hyderabad, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View details
    View ASIC DFT Engineer
  • Expired
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    ASIC DFT Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT JTAG ATPG
    View details
    View ASIC DFT Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM verification
    View details
    View ASIC Engineer
  • Expired
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    Software Engineer - Embedded Devices hot job

    @ Cisco

    ๐Ÿ“Durham, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C C++ Python
    View details
    View Software Engineer - Embedded Devices
  • Expired
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    ASIC Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM RTL
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer - DFT, JTAG, Scan Insertion, ATPG

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    JTAG ATPG Tcl
    View details
    View ASIC Engineer - DFT, JTAG, Scan Insertion, ATPG
  • Expired
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    Senior Embedded Software Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C++ Python Linux
    View details
    View Senior Embedded Software Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Hyderabad, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View details
    View ASIC Engineer
  • Expired
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    Senior Embedded Software Engineer hot job

    @ Cisco

    ๐Ÿ“CA, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C C++ Python
    View details
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  • Expired
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    Embedded Software Engineer hot job

    @ Cisco

    ๐Ÿ“CA, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C++ Python FPGA
    View details
    View Embedded Software Engineer
  • Expired
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    FPGA Senior Design Engineer hot job

    @ Cisco

    ๐Ÿ“CA, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Verilog SystemVerilog
    View details
    View FPGA Senior Design Engineer
  • Expired
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    Embedded Software Engineer

    @ Cisco

    ๐Ÿ“CA, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    BSP FPGA I2C
    View details
    View Embedded Software Engineer
  • Expired
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    Hardware Engineer- FPGA Design Verification

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    FPGA Verilog UVM
    View details
    View Hardware Engineer- FPGA Design Verification
  • Expired
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    Hardware Engineer- FPGA, RTL Design, Verilog

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Verilog VHDL
    View details
    View Hardware Engineer- FPGA, RTL Design, Verilog
  • Expired
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    Junior ASIC Engineer - Israel - ETR

    @ Cisco

    ๐Ÿ“Caesarea, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š junior
    โฑ๏ธŽ full-time
    ASIC Physical Design
    View details
    View Junior ASIC Engineer - Israel - ETR
  • Expired
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    ASIC SDK Engineering Director

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SDK Networking
    View details
    View ASIC SDK Engineering Director
  • Expired
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    ASIC Physical Design Engineer - Maynard, MA hot job

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC RTL STA
    View details
    View ASIC Physical Design Engineer - Maynard, MA
  • Expired
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    Senior ASIC Physical Design Engineer - Maynard, MA hot job

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC STA Synopsys
    View details
    View Senior ASIC Physical Design Engineer - Maynard, MA
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Armenia, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Verilog SystemVerilog AMBA
    View details
    View ASIC Engineer
  • Expired
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    Hardware Engineer- FPGA Design Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Verilog VHDL
    View details
    View Hardware Engineer- FPGA Design Engineer
  • Expired
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    ASIC Verification Engineer - Acacia hot job

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SystemVerilog UVM
    View details
    View ASIC Verification Engineer - Acacia
  • Expired
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    Senior Hardware Engineer- FPGA hot job

    @ Cisco

    ๐Ÿ“CA, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Verilog UVM
    View details
    View Senior Hardware Engineer- FPGA
  • Expired
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    FPGA Design Verification

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Verilog SystemVerilog UVM
    View details
    View FPGA Design Verification
  • Expired
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    Senior Hardware Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    PCB Cadence Signal
    View details
    View Senior Hardware Engineer
  • Expired
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    ASIC Design Engineer

    @ Cisco

    ๐Ÿ“Cairo, Egypt ๐Ÿ‡ช๐Ÿ‡ฌ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Verilog SystemVerilog Python
    View details
    View ASIC Design Engineer
  • Expired
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    Embedded Software Engineer hot job

    @ Cisco

    ๐Ÿ“CA, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    BSP FPGA I2C
    View details
    View Embedded Software Engineer
  • Expired
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    ASIC Verification Engineer

    @ Cisco

    ๐Ÿ“Cairo, Egypt ๐Ÿ‡ช๐Ÿ‡ฌ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ
    SystemVerilog UVM Python
    View details
    View ASIC Verification Engineer
  • Expired
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    ASIC Reliability Engineer hot job

    @ Cisco

    ๐Ÿ“San Francisco, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC reliability semiconductor
    View details
    View ASIC Reliability Engineer
  • Expired
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    ASIC Reliability Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    reliability semiconductor analysis
    View details
    View ASIC Reliability Engineer
  • Expired
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    Embedded Software Engineer Wireless

    @ Cisco

    ๐Ÿ“Norway, Norway ๐Ÿ‡ณ๐Ÿ‡ด
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Wi-Fi Bluetooth C
    View details
    View Embedded Software Engineer Wireless
  • Expired
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    Embedded Software Engineer

    @ Cisco

    ๐Ÿ“Norway, Norway ๐Ÿ‡ณ๐Ÿ‡ด
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Embedded Linux C++
    View details
    View Embedded Software Engineer
  • Expired
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    Senior Firmware Development Engineer hot job

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Firmware BMC IPMI
    View details
    View Senior Firmware Development Engineer
  • Expired
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    Firmware Development Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Firmware BMC PCIe
    View details
    View Firmware Development Engineer
  • Expired
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    ASIC Design Engineer | 4 to 6 years

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    RTL Verilog SystemVerilog
    View details
    View ASIC Design Engineer | 4 to 6 years
  • Expired
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    ASIC Engineer - Cisco Silicon One - Shanghai

    @ Cisco

    ๐Ÿ“Shanghai, China ๐Ÿ‡จ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC Verilog SystemVerilog
    View details
    View ASIC Engineer - Cisco Silicon One - Shanghai
  • Expired
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    Senior RTL Design Engineer

    @ Cisco

    ๐Ÿ“Yerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Verilog SystemVerilog SoC
    View details
    View Senior RTL Design Engineer
  • Expired
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    Hardware Engineer - FPGA hot job

    @ Cisco

    ๐Ÿ“CA, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    FPGA RTL Verilog
    View details
    View Hardware Engineer - FPGA
  • Expired
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    Junior ASIC Engineer

    @ Cisco

    ๐Ÿ“Belgrade, Serbia ๐Ÿ‡ท๐Ÿ‡ธ
    ๐Ÿ“Š junior
    โฑ๏ธŽ full-time
    ASIC Verilog SystemVerilog
    View details
    View Junior ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Belgrade, Serbia ๐Ÿ‡ท๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM ASIC
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Belgrade, Serbia ๐Ÿ‡ท๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM ASIC
    View details
    View ASIC Engineer
  • Expired
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    ASIC EM/IR Analysis Engineer

    @ Cisco

    ๐Ÿ“Yerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    EM/IR CMOS ESD
    View details
    View ASIC EM/IR Analysis Engineer
  • Expired
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    ASIC Design Engineer - Cisco Silicon One

    @ Cisco

    ๐Ÿ“Tel Aviv-Yafo, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    RTL Verilog UVM
    View details
    View ASIC Design Engineer - Cisco Silicon One
  • Expired
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    ASIC Design/DV Engineer - Cisco Silicon One

    @ Cisco

    ๐Ÿ“Shanghai, China ๐Ÿ‡จ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    UVM Verilog SystemVerilog
    View details
    View ASIC Design/DV Engineer - Cisco Silicon One
  • Expired
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    Junior ASIC Engineer

    @ Cisco

    ๐Ÿ“Belgrade, Serbia ๐Ÿ‡ท๐Ÿ‡ธ
    ๐Ÿ“Š junior
    โฑ๏ธŽ full-time
    ASIC UVM Verilog
    View details
    View Junior ASIC Engineer
  • Expired
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    Hardware Engineer - FPGA hot job

    @ Cisco

    ๐Ÿ“CA, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Verilog RTL
    View details
    View Hardware Engineer - FPGA
  • Expired
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    Senior RTL Design Engineer hot job

    @ Cisco

    ๐Ÿ“Yerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Verilog SystemVerilog AMBA
    View details
    View Senior RTL Design Engineer
  • Expired
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    ASIC Design/DV Engineer - Cisco Silicon One

    @ Cisco

    ๐Ÿ“Shanghai, China ๐Ÿ‡จ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC UVM Verilog
    View details
    View ASIC Design/DV Engineer - Cisco Silicon One
  • Expired
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    Senior RTL Design Engineer

    @ Cisco

    ๐Ÿ“Yerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Verilog SystemVerilog AMBA
    View details
    View Senior RTL Design Engineer
  • Expired
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    Design Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC Verification Python
    View details
    View Design Verification Engineer
  • Expired
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    FPGA Design Engineer

    @ Cisco

    ๐Ÿ“Oslo, Norway ๐Ÿ‡ณ๐Ÿ‡ด
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    FPGA RTL Python
    View details
    View FPGA Design Engineer
  • Expired
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    Senior FPGA Design Engineer hot job

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Verilog SystemVerilog
    View details
    View Senior FPGA Design Engineer
  • Expired
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    ASIC Design Engineer

    @ Cisco

    ๐Ÿ“Cairo, Egypt ๐Ÿ‡ช๐Ÿ‡ฌ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Verilog SystemVerilog Python
    View details
    View ASIC Design Engineer
  • Expired
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    ASIC Design Engineer | 6 to 9 years

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC RTL Verilog
    View details
    View ASIC Design Engineer | 6 to 9 years
  • Expired
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    Senior ASIC Timing Engineer

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC timing TCL
    View details
    View Senior ASIC Timing Engineer
  • Expired
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    Senior RTL Design Engineer

    @ Cisco

    ๐Ÿ“Yerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Verilog SystemVerilog Python
    View details
    View Senior RTL Design Engineer
  • Expired
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    ASIC Technical Design Lead Engineer hot job

    @ Cisco

    ๐Ÿ“Yerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT SystemVerilog Tcl
    View details
    View ASIC Technical Design Lead Engineer
  • Expired
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    ASIC DFT Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    DFT Jtag ATPG
    View details
    View ASIC DFT Engineer
  • Expired
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    ASIC DFT Engineer

    @ Cisco

    ๐Ÿ“Hyderabad, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Jtag ATPG Tcl
    View details
    View ASIC DFT Engineer
  • Expired
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    Embedded Software Engineer

    @ Cisco

    ๐Ÿ“Oslo, Norway ๐Ÿ‡ณ๐Ÿ‡ด
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Embedded Linux C++
    View details
    View Embedded Software Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC SoC UVM
    View details
    View ASIC Engineer
  • Expired
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    Senior Embedded Engineer-

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C++ Python Linux
    View details
    View Senior Embedded Engineer-
  • Expired
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    Hardware Engineer - ASIC Testing

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC ATE VHDL
    View details
    View Hardware Engineer - ASIC Testing
  • Expired
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    Embedded Software Engineer

    @ Cisco

    ๐Ÿ“CA, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Linux Yocto Docker
    View details
    View Embedded Software Engineer
  • Expired
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    Ingรฉnieur DSP principal

    @ Cisco

    ๐Ÿ“Ottawa, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š principal
    โฑ๏ธŽ full-time
    DSP FEC ASIC
    View details
    View Ingรฉnieur DSP principal
  • Expired
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    Hardware FPGA Design Engineer

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Verilog Python
    View details
    View Hardware FPGA Design Engineer
  • Expired
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    ASIC Design Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Verilog SystemVerilog
    View details
    View ASIC Design Engineer
  • Expired
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    ASIC Engineer II United States

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ internship
    ASIC VHDL Verilog
    View details
    View ASIC Engineer II United States
  • Expired
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    ASIC Engineer II United States

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ full-time
    ASIC VLSI EDA
    View details
    View ASIC Engineer II United States
  • Expired
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    ASIC Mechanical Engineer

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC simulation thermomechanical
    View details
    View ASIC Mechanical Engineer
  • Expired
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    ASIC DESIGN FOR TEST ENGINEER - Acacia

    @ Cisco

    ๐Ÿ“Austin, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    MBIST DFT ATPG
    View details
    View ASIC DESIGN FOR TEST ENGINEER - Acacia
  • Expired
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    ASIC Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM Perl
    View details
    View ASIC Verification Engineer
  • Expired
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    ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View details
    View ASIC Design Verification Engineer
  • Expired
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    ASIC Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View details
    View ASIC Verification Engineer
  • Expired
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    ASIC Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC UVM Verilog
    View details
    View ASIC Verification Engineer
  • Expired
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    Design Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC SystemVerilog Verification
    View details
    View Design Verification Engineer
  • Expired
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    Embedded Software Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C Linux SNMP
    View details
    View Embedded Software Engineer
  • Expired
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    ASIC Engineer I United States

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ full-time
    ASIC VLSI design
    View details
    View ASIC Engineer I United States
  • Expired
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    ASIC Engineer I United States

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š entry-level
    โฑ๏ธŽ full-time
    ASIC VLSI NPU
    View details
    View ASIC Engineer I United States
  • Expired
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    ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View details
    View ASIC Design Verification Engineer
  • Expired
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    ASIC Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC C++ UVM
    View details
    View ASIC Verification Engineer
  • Expired
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    ASIC Design Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC UVM SystemVerilog
    View details
    View ASIC Design Verification Engineer
  • Expired
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    Embedded Software Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Linux Yocto Docker
    View details
    View Embedded Software Engineer
  • Expired
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    ASIC Reliability Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Reliability Testing Analysis
    View details
    View ASIC Reliability Engineer
  • Expired
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    ASIC Verification Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View details
    View ASIC Verification Engineer
  • Expired
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    Design Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC SystemVerilog Python
    View details
    View Design Verification Engineer
  • Expired
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    ASIC Design Engineer - Cisco Silicon One

    @ Cisco

    ๐Ÿ“Caesarea, Israel ๐Ÿ‡ฎ๐Ÿ‡ฑ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    RTL UVM Matlab
    View details
    View ASIC Design Engineer - Cisco Silicon One
  • Expired
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    ASIC Verification Engineer

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC verification UVM
    View details
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  • Expired
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    ASIC DESIGN FOR TEST ENGINEER - Acacia

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    MBIST ATPG RTL
    View details
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  • Expired
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    Senior ASIC Design Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Verilog SystemVerilog
    View details
    View Senior ASIC Design Engineer
  • Expired
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    Embedded Software Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Linux C C++
    View details
    View Embedded Software Engineer
  • Expired
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    ASIC Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View details
    View ASIC Verification Engineer
  • Expired
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    ASIC Package Signal/Power Integrity Engineer hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Signal Integrity Electromagnetics
    View details
    View ASIC Package Signal/Power Integrity Engineer
  • Expired
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    ASIC Engineering Technical Leader - SDC

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SDC STA Verilog
    View details
    View ASIC Engineering Technical Leader - SDC
  • Expired
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    ASIC Design Engineer - Design & Timing Constraints

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SDC STA
    View details
    View ASIC Design Engineer - Design & Timing Constraints
  • Expired
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    ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View details
    View ASIC Design Verification Engineer
  • Expired
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    Senior FPGA Engineer

    @ Cisco

    ๐Ÿ“Shanghai, China ๐Ÿ‡จ๐Ÿ‡ณ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    FPGA Verilog Quartus
    View details
    View Senior FPGA Engineer
  • Expired
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    Principal Embedded Systems Engineer, Core Product hot job

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š principal
    โฑ๏ธŽ full-time
    C++ Linux IPC
    View details
    View Principal Embedded Systems Engineer, Core Product
  • Expired
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    ASIC DESIGN FOR TEST ENGINEER - Acacia

    @ Cisco

    ๐Ÿ“United States, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    MBIST JTAG ATPG
    View details
    View ASIC DESIGN FOR TEST ENGINEER - Acacia
  • Expired
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    Senior ASIC Design Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Verilog Python
    View details
    View Senior ASIC Design Engineer
  • Expired
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    Senior Antenna Hardware Design Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Antenna RF Wi-Fi
    View details
    View Senior Antenna Hardware Design Engineer
  • Expired
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    Senior Antenna Hardware Design Engineer

    @ Cisco

    ๐Ÿ“San Francisco, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    antenna electromagnetism RF
    View details
    View Senior Antenna Hardware Design Engineer
  • Expired
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    Senior Technical Leader - Embedded Software

    @ Cisco

    ๐Ÿ“Canada, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    C/C++ Python multithreading
    View details
    View Senior Technical Leader - Embedded Software
  • Expired
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    Technical Leader ASIC Design - Prototyping

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC FPGA Verilog
    View details
    View Technical Leader ASIC Design - Prototyping
  • Expired
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    Principal Embedded Systems Engineer, Core Product

    @ Cisco

    ๐Ÿ“San Francisco, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š principal
    โฑ๏ธŽ full-time
    C++ Linux IPC
    View details
    View Principal Embedded Systems Engineer, Core Product
  • Expired
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    Senior Antenna Hardware Design Engineer hot job

    @ Cisco

    ๐Ÿ“San Francisco, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Antenna RF Electromagnetism
    View details
    View Senior Antenna Hardware Design Engineer
  • Expired
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    Senior ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SystemVerilog UVM
    View details
    View Senior ASIC Design Verification Engineer
  • Expired
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    ASIC Verification Engineer, Technical Leader

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC SystemVerilog UVM
    View details
    View ASIC Verification Engineer, Technical Leader
  • Expired
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    Development Engineer - Embedded Software

    @ Cisco

    ๐Ÿ“Kanata, Canada ๐Ÿ‡จ๐Ÿ‡ฆ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    C++ Python Linux
    View details
    View Development Engineer - Embedded Software
  • Expired
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    ASIC Design Verification Engineer

    @ Cisco

    ๐Ÿ“Taipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View details
    View ASIC Design Verification Engineer
  • Expired
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    Principal Embedded Systems Engineer, Core Product hot job

    @ Cisco

    ๐Ÿ“United States, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š principal
    โฑ๏ธŽ full-time
    C++ Linux IPC
    View details
    View Principal Embedded Systems Engineer, Core Product
  • Expired
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    ASIC Design Engineer, Technical Leader

    @ Cisco

    ๐Ÿ“Raleigh, NC, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Verilog SystemVerilog
    View details
    View ASIC Design Engineer, Technical Leader
  • Expired
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    ASIC DFT Engineer :: Exp - 2 to 4 Years

    @ Cisco

    ๐Ÿ“Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Verilog Jtag ATPG
    View details
    View ASIC DFT Engineer :: Exp - 2 to 4 Years
  • Expired
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    ASIC DFT Engineer :: Exp - 2 to 4 Years

    @ Cisco

    ๐Ÿ“Chennai, India ๐Ÿ‡ฎ๐Ÿ‡ณ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Verilog Jtag ATPG
    View details
    View ASIC DFT Engineer :: Exp - 2 to 4 Years
  • Expired
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    ASIC DESIGN FOR TEST ENGINEER - Acacia

    @ Cisco

    ๐Ÿ“Maynard, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT ATPG RTL
    View details
    View ASIC DESIGN FOR TEST ENGINEER - Acacia
  • Expired
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    ASIC DESIGN FOR TEST ENGINEER - Acacia hot job

    @ Cisco

    ๐Ÿ“United States, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    DFT ATPG RTL
    View details
    View ASIC DESIGN FOR TEST ENGINEER - Acacia
  • Expired
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    ASIC Design Engineer

    @ Cisco

    ๐Ÿ“Cairo, Egypt ๐Ÿ‡ช๐Ÿ‡ฌ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC Verilog SystemVerilog
    View details
    View ASIC Design Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Belgrade, Serbia ๐Ÿ‡ท๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM debugging
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Belgrade, Serbia ๐Ÿ‡ท๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Novi Sad, Serbia ๐Ÿ‡ท๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    SystemVerilog UVM Python
    View details
    View ASIC Engineer
  • Expired
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    ASIC Engineer

    @ Cisco

    ๐Ÿ“Novi Sad, Serbia ๐Ÿ‡ท๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    SystemVerilog UVM ASIC
    View details
    View ASIC Engineer
  • Expired
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    ASIC Physical Design Engineer

    @ Cisco

    ๐Ÿ“Portugal, Portugal ๐Ÿ‡ต๐Ÿ‡น
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    ASIC synthesis placement
    View details
    View ASIC Physical Design Engineer
  • Expired
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    ASIC Physical Design Engineer

    @ Cisco

    ๐Ÿ“Oeiras, Portugal ๐Ÿ‡ต๐Ÿ‡น
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    ASIC verification synthesis
    View details
    View ASIC Physical Design Engineer
  • Expired
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    Sr. Software Engineer Security hot job

    @ Cisco

    ๐Ÿ“Raleigh, NC, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š senior
    โฑ๏ธŽ full-time
    Rust C C++
    View details
    View Sr. Software Engineer Security
  • Expired
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    Embedded Software Engineer-Kernel

    @ Cisco

    ๐Ÿ“San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ
    ๐Ÿ“Š mid-level
    โฑ๏ธŽ full-time
    Linux Kernel C/C++
    View details
    View Embedded Software Engineer-Kernel
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Company Info
Employees 10001+
Founded 1984
Type Public
Stock CSCO
Glassdoor 4.2
Connect
Active Hiring Locations
๐Ÿ“ San Jose, United States ๐Ÿ‡บ๐Ÿ‡ธ 39
๐Ÿ“ Bengaluru, India ๐Ÿ‡ฎ๐Ÿ‡ณ 20
๐Ÿ“ Bangalore South, India ๐Ÿ‡ฎ๐Ÿ‡ณ 9
๐Ÿ“ Milpitas, United States ๐Ÿ‡บ๐Ÿ‡ธ 5
๐Ÿ“ Yerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ 5
Top Roles
ASIC Design Engineer (55) Hardware Engineer (15) Embedded Software Engineer (11) Embedded Systems Engineer (6) FPGA Engineer (5)
Key Skills
Python ASIC SystemVerilog UVM Verilog C++ RTL Tcl
Seniority Levels
senior (74) mid-level (29) entry-level (4) junior (1) principal (1)
Work Arrangement
On-site (109)

About Cisco

Cisco develops networking hardware, software, and telecommunications equipment from its headquarters in San Jose, California. Its product lines include routers, switches, and security solutions, serving various markets such as enterprise, service provider, and data center environments. Engineering disciplines at Cisco encompass hardware design, embedded systems, and software development. Engineers tackle challenges in network security, ASIC design, and system integration, contributing to a vast portfolio of products. With over 75,000 employees, Cisco operates multiple engineering sites globally, ensuring a diverse range of expertise and innovation.

Cisco Career Opportunities

Cisco currently has 109 active embedded systems positions spanning 10 countries. All positions are on-site, typical for hardware-focused roles requiring lab access and equipment. Recognized as a top-tier employer (85.0/100), Cisco offers competitive compensation and strong career development paths in embedded engineering.

Cisco Hiring Trends

* Data represents job posting activity over the past 6 months: Feb 2026 through Jul 2026

Cisco's hiring pace has moderated recently (48 openings this month vs 86 last month), which is common after major hiring pushes or as projects move from development to deployment phases.

Over the past 6 months, Cisco averaged 47.2 job postings per month, with peak hiring in Jun 2026 (86 openings). For embedded systems roles, hiring activity typically correlates with product development cycles, especially for firmware teams during pre-production phases and hardware engineers during prototyping.

Current Month
48 jobs

๐Ÿ“‰ -44% change

6-Month Average
47.2 jobs/month

Consistent hiring velocity

Peak Activity
86 jobs

Jun 2026

Required Skills at Cisco

Python is the most in-demand skill at Cisco, appearing in 46% of all job listings (past and present). This skill is important but not universal, indicating diverse technical needs across different product lines or teams.

Cisco's technology stack spans 313 distinct skills and tools, reflecting the multifaceted nature of embedded systems development. The broad technical diversity (313 technologies) suggests work on complex, multi-domain projects requiring both hardware and software expertise.

Python
46% of roles
46%
ASIC
38% of roles
38%
SystemVerilog
27% of roles
27%
UVM
22% of roles
22%
Verilog
22% of roles
22%
C++
16% of roles
16%
RTL
12% of roles
12%
Tcl
11% of roles
11%
Linux
11% of roles
11%
PCIe
11% of roles
11%
DFT
10% of roles
10%
FPGA
10% of roles
10%

Engineers joining Cisco should combine depth in key areas with adaptability. The mix of hardware skills (PCB design, schematics) and firmware expertise (RTOS, embedded C) indicates full-stack embedded development where engineers work across the hardware-software boundary. Candidates with adjacent skills (version control, testing frameworks, communication protocols) typically advance faster by contributing across the development lifecycle.

Engineering Roles at Cisco

Cisco's primary hiring focus is ASIC Design Engineer with 55 open positions. High-volume recruitment for a single role type typically indicates either a growing team building similar capabilities or a newly formed department scaling rapidly.

Multiple openings in the same discipline create advantages for new hires: stronger peer support networks, established onboarding processes, and clearer career progression paths as the team matures. Engineers often find collaborative environments more conducive to professional growth.

ASIC Design Engineer
55 positions (50%)
55
Hardware Engineer
15 positions (14%)
15
Embedded Software Engineer
11 positions (10%)
11
Embedded Systems Engineer
6 positions (6%)
6
FPGA Engineer
5 positions (5%)
5
Analog Design Engineer
5 positions (5%)
5
Signal Integrity Engineer
3 positions (3%)
3
Power Electronics Engineer
2 positions (2%)
2
Design Verification Engineer
2 positions (2%)
2

Experience level distribution: 68% of openings target senior-level engineers. The range across 5 experience levels suggests a well-balanced team structure with opportunities for both experienced engineers and those earlier in their careers.

Where Cisco is Hiring

Cisco operates across 14 countries with 46 total hiring locations. Multi-geography recruitment typically indicates either distributed engineering teams, expansion into new markets, or proximity to manufacturing and customer operations.

San Jose, United States serves as a primary hiring hub with 31% of all roles (128 positions). Engineering capabilities are distributed relatively evenly across locations, suggesting a genuinely multi-site development model rather than a single headquarters-centric approach.

๐Ÿ‡บ๐Ÿ‡ธ
San Jose, United States
39 active jobs
39
๐Ÿ‡ฎ๐Ÿ‡ณ
Bengaluru, India
20 active jobs
20
๐Ÿ‡ฎ๐Ÿ‡ณ
Bangalore South, India
9 active jobs
9
๐Ÿ‡บ๐Ÿ‡ธ
Milpitas, United States
5 active jobs
5
๐Ÿ‡ฆ๐Ÿ‡ฒ
Yerevan, Armenia
5 active jobs
5
๐Ÿ‡บ๐Ÿ‡ธ
Carlsbad, United States
4 active jobs
4
๐Ÿ‡น๐Ÿ‡ผ
Taipei, Taiwan
4 active jobs
4
๐Ÿ‡ณ๐Ÿ‡ด
Bรฆrum, Norway
4 active jobs
4
๐Ÿ‡น๐Ÿ‡ท
Kayseri, Turkey
3 active jobs
3
๐Ÿ‡ฎ๐Ÿ‡ฑ
Kayseri, Israel
2 active jobs
2
๐Ÿ‡จ๐Ÿ‡ฆ
Ottawa, Canada
2 active jobs
2
๐Ÿ‡จ๐Ÿ‡ญ
Thalwil, Switzerland
1 active job
1
๐Ÿ‡บ๐Ÿ‡ธ
San Francisco, United States
1 active job
1
๐Ÿ‡น๐Ÿ‡ผ
Zhubei City, Taiwan
1 active job
1
๐Ÿ‡ฎ๐Ÿ‡ฑ
Tel-Aviv, Israel
1 active job
1
๐Ÿ‡บ๐Ÿ‡ธ
Tempe, United States
1 active job
1
๐Ÿ‡บ๐Ÿ‡ธ
Durham County, United States
1 active job
1
๐Ÿ‡บ๐Ÿ‡ธ
Maynard, United States
1 active job
1
๐Ÿ‡บ๐Ÿ‡ธ
Albuquerque, United States
1 active job
1
๐Ÿ‡บ๐Ÿ‡ธ
Santa Monica, United States
1 active job
1
๐Ÿ‡ช๐Ÿ‡ฌ
Cairo, Egypt
1 active job
1
๐Ÿ‡บ๐Ÿ‡ธ
Austin, United States
1 active job
1
๐Ÿ‡ฎ๐Ÿ‡ณ
Mulshi, India
1 active job
1
๐Ÿ‡ฆ๐Ÿ‡ฒ
Armenia, Armenia
14 previous jobs
๐Ÿ‡จ๐Ÿ‡ฆ
CA, Canada
9 previous jobs

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These employers share technical focus areas with Cisco and are actively hiring embedded engineers. Exploring multiple companies helps candidates understand market compensation, compare technical challenges, and identify the best cultural and technical fit for their career goals.

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