Bootstrap
← Go Back

Avicena Tech

UK Junior ASIC Validation Engineer

📌Edinburgh, United Kingdom 🇬🇧

Apply Now ↗

⏱︎ full-time

🧙‍♂️ junior

Avicena is a privately held company developing microLED based ultra-low power high bandwidth interconnects for chip-to-chip communications.  This technology will revolutionize High-Performance (HPC) and Cloud computing, as well as other industries where low power interconnects are critical like camera sensors, autonomous vehicles, and aerospace. Avicena is headquartered in Sunnyvale, California with a development center in Edinburgh, Scotland. The company was founded in 2019 by leading technologists from the optical networking industry with a track record of delivering breakthrough products.  (www.avicena.tech)

Responsibilities

  • Bring up, debug and characterize ASICs on evaluation platforms.
  • Set up test plans and infrastructure for ASIC IC bring up and characterization and work towards PCBA design and development for verification and characterisation of ASIC performance.
  • Selection of key test instruments and tools required to complete ASIC bring up, verification and characterization.
  • Work with test software developer to define and help test software for ASIC debug and characterization.
  • Analyse test results, diagnose issues, revise test setups and procedures to improve measurements and isolate functional and performance issues.

Qualifications

  • BSc/MSc or higher in Electrical Engineering with analogue and digital circuit design being the primary focus of the course to be able to communicate and liaise with ASIC design engineers.
  • Experience in the relevant field of evaluation and test engineering is a bonus.
  • Must be familiar with standard communication protocols such as I2C, SPI, MDIO and ethernet.
  • Understanding of RF design and testing using various optical and electronic test equipment including oscilloscopes, VNAs and power supplies is desirable.
  • Working level proficiency in Python for code development to automate product testing and evaluation is expected.
  • Should be able to ramp up fast enough to be able to help program microcontrollers and facilitate board/ASIC communications for tests and debug.
  • Flexible, quick learner, ability to work in a fast-paced startup environment.
Other similar jobs

Senior ASIC Timing Engineer

@ NVIDIA, 📍United Kingdom 🇬🇧

Senior ASIC Timing Engineer

@ NVIDIA, 📍United Kingdom 🇬🇧

CPU Physical Design Principal Engineer

@ Qualcomm, 📍United Kingdom 🇬🇧

ASIC Analog Design Engineer - REF79515L

@ Continental, 📍United Kingdom 🇬🇧

Staff Engineer, Digital IC Design

@ Marvell Technology, 📍United Kingdom 🇬🇧

Senior ASIC Design Engineer

@ IC Resources, 📍United Kingdom 🇬🇧

ASIC Design Verification Engineer, Annapurna Labs

@ Amazon, 📍United Kingdom 🇬🇧

ASIC Design Verification Engineer, Annapurna Labs

@ Amazon, 📍United Kingdom 🇬🇧

ASIC RTL Engineer, Annapurna Labs

@ Amazon, 📍United Kingdom 🇬🇧

ASIC Physical Design Engineer, Annapurna Labs

@ Amazon, 📍United Kingdom 🇬🇧

  • Employment

    ⏱︎ full-time

  • Experience

    🧙‍♂️ junior

  • Skills
  • Industry
  • Find similar jobs

    Senior ASIC Timing Engineer

    @ NVIDIA, 📍United Kingdom 🇬🇧

    Senior ASIC Timing Engineer

    @ NVIDIA, 📍United Kingdom 🇬🇧

    CPU Physical Design Principal Engineer

    @ Qualcomm, 📍United Kingdom 🇬🇧

    ASIC Analog Design Engineer - REF79515L

    @ Continental, 📍United Kingdom 🇬🇧

    Staff Engineer, Digital IC Design

    @ Marvell Technology, 📍United Kingdom 🇬🇧

    Senior ASIC Design Engineer

    @ IC Resources, 📍United Kingdom 🇬🇧

    ASIC Design Verification Engineer, Annapurna Labs

    @ Amazon, 📍United Kingdom 🇬🇧

    ASIC Design Verification Engineer, Annapurna Labs

    @ Amazon, 📍United Kingdom 🇬🇧

    ASIC RTL Engineer, Annapurna Labs

    @ Amazon, 📍United Kingdom 🇬🇧

    ASIC Physical Design Engineer, Annapurna Labs

    @ Amazon, 📍United Kingdom 🇬🇧

Apply now ↗
Remote Work
Post time
Level
Employment
Industry
Apply Now ↗