What You'll Be Doing
- Participate in the research of verification methodology to improve automation and productivity to produce NVIDIA's new high-quality products.
- Read the IAS and design specs to understand the design requirements and build a corresponding test plan. Review the testplan with arch/design engineers.
- You responses to build a block/IP testbench based on UVM methodology.
- The responsibilities include building a test run and a regression flow. Triage failures in regression and help the designer root cause the bug.
- Work includes building various metrics (passing rate, functional coverage, etc) and monitoring its health.
- Take SOC verification on full chip test environment for IPs
- Analyse functional/code coverage results and identify the coverage holes. Work with the design engineer to improve the coverage score.
-
Deploy the advanced verification methodology and infrastructure of the SOC/IP
- BS / MS in electrical / computer engineering or equivalent experience.
- 3+ years (MS) or 5+ years (BS) working experience.
- Familiar with advanced verification methodology, tools and flow
- Fully experienced verification flow, including testplan, test, coverage model, testbench, and BFM modeling.
-
Deep understanding of Verilog and HVL (High-level Verification Language)
- Strong programming skills in Perl and C/C++is plus
- Having good architectural or design experience is a big plus.
-
At least good at one of the scripting programming languages: Perl, Shell, Ruby, Python.
JR1998434
Senior Embedded Software Engineer
@ Embedd 
What we're looking for
At embedd.it, we power hardware-software integration in embedded devices. We turn fragmented semiconductor chip data into configurable digital twins, then deterministically generate code, tests, and documentation – making integration faster, cheaper, and resilient to supply chain shocks.
We’re looking for a true legend – someone with abstract thinking and deep expertise in low-level software development. You’ll build vendor-agnostic tooling for MCU and peripheral integration to solve hardware-software integration once and for all. We work at the intersection of embedded systems, code generation, compilers, and machine learning. It’s your chance to help redefine how low-level development is done.
Responsibilities
- Drive the architecture of the driver structures and system layout
- Define scalable patterns for cross-architectural integration across bare-metal, Zephyr, Linux, and other environments
- Deconstruct complex SoC device trees and translate hardware descriptions into structured internal models for automated reasoning
- Partner with the ML team to shape data and annotation models for AI-driven data-extraction tooling
Qualifications
- 5+ years of experience in embedded systems development, including bare-metal and RTOS-based systems
- Proficiency in C/C++
- Familiarity with firmware configuration, SoC bring-up, and system-level debugging
- Hands-on experience with code generation tools, or low-level compiler/decompiler/emulator technologies
- Strong background in embedded toolchains: compilers, linkers, debuggers, and build systems
- Python or scripting for automation and tooling is a plus
- Experience with functional-safety standards is a plus
Why embedd.it?
- Dynamic, venture-backed team of engineers challenging the status quo 🚀
- Work at the intersection of embedded systems, code generators, compilers, and ML 🤖
- Unusual challenges requiring out-of-the-box abstract thinking 🧠
- Competitive compensation: cash + equity 💰
- Remote work possible 🌍
About Us
embedd.it is a UK-based startup reinventing embedded development. Our platform transforms unstructured semiconductor data into structured digital twins, enabling automatic generation of drivers, tests, and documentation. We're building a single, traceable source of truth to make integration fast, vendor-agnostic, and future-proof.
Other similar jobs
IP SMMU Design Verification Principal Engineer
@ Qualcomm, 📍China 🇨🇳
Design Verification Engineer, ASIC
@ Waymo, 📍China 🇨🇳
Design Verification Engineer, ASIC
@ Waymo, 📍China 🇨🇳
Engineer, Design Verification
@ Corinex, 📍China 🇨🇳
Design Verification Engineer - System Verilog
@ Creeno Solutions Pvt Ltd, 📍China 🇨🇳
We are Hiring Design Verification Engineers
@ Eximietas Design, 📍China 🇨🇳
We are Hiring Design Verification Engineers
@ Eximietas Design, 📍China 🇨🇳
We are Hiring Design Verification Engineers
@ Eximietas Design, 📍China 🇨🇳
We are Hiring Design Verification Engineers
@ Eximietas Design, 📍China 🇨🇳
We are Hiring Design Verification Engineers
@ Eximietas Design, 📍China 🇨🇳
-
Employment
⏱︎ full-time
-
Experience
🧙♂️ senior
-
Skills
-
Industry
-
Find similar jobs
IP SMMU Design Verification Principal Engineer
@ Qualcomm, 📍China 🇨🇳
Design Verification Engineer, ASIC
@ Waymo, 📍China 🇨🇳
Design Verification Engineer, ASIC
@ Waymo, 📍China 🇨🇳
Engineer, Design Verification
@ Corinex, 📍China 🇨🇳
Design Verification Engineer - System Verilog
@ Creeno Solutions Pvt Ltd, 📍China 🇨🇳
We are Hiring Design Verification Engineers
@ Eximietas Design, 📍China 🇨🇳
We are Hiring Design Verification Engineers
@ Eximietas Design, 📍China 🇨🇳
We are Hiring Design Verification Engineers
@ Eximietas Design, 📍China 🇨🇳
We are Hiring Design Verification Engineers
@ Eximietas Design, 📍China 🇨🇳
We are Hiring Design Verification Engineers
@ Eximietas Design, 📍China 🇨🇳