Design Verification Engineer

🚨 We’re Hiring | Design Verification Engineer 🚨

📍 Location: Bangalore

💼 Experience: 3 to 5 Years

🏢 Work Mode: Work from Office

We are looking for a Design Verification Engineer with strong hands‑on experience in SoC verification to join our team.

🔧 Key Responsibilities & Skills

• Develop SoC testcases using SystemVerilog (UVM) and C / ARM / RISC‑V Assembly
• Mandatory experience in SoC‑level verification
• Strong knowledge of AMBA protocols (AHB, AXI)
• Create Verification Plans from specifications using vManager
• Define and track coverage and design completeness
• Develop random constraint tests to meet coverage goals
• Write assertions, covergroups, checkers, monitors , and enable auto reporting
• Set up and run regressions , debug failures, and file JIRA tickets
• Hands‑on with UVM testbench creation and implementation

✅ Good to Have

• Experience in Mixed‑Signal Verification
• Experience with Automotive SoC
• Scripting knowledge: Shell / Perl / Python
• Exposure to Cadence SKILL language

🎓 Qualification

• BSEE (MSEE preferred) or equivalent
• 3–5 years of industry experience in Digital / Multi‑core SoC Verification
• Ability to work independently and collaborate closely with the team

📩 Interested candidates, please share your profile or DM me for more details.

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