๐ San Francisco, California
Lattice designs low-power FPGAs and programmable logic devices, serving markets such as communications, automotive, and industrial automation from its headquarters in Hillsboro, Oregon. The Lattice Nexus and MachXO families are key products that enable efficient processing and connectivity in edge applications. Engineering disciplines include digital design, analog design, and verification, focusing on optimizing power consumption and performance in embedded systems. With a commitment to innovation, Lattice employs a diverse team of engineers who tackle challenges in SoC design and integration, ensuring robust solutions for a wide range of applications.
SW QA Engineer
@ Lattice
SOC RTL Design Engineer
@ Lattice
SOC RTL Design Engineer
@ Lattice
AI Architect โ EDA & FPGA Software Development
@ Lattice
Silicon Validation Tech Lead โ Next-Gen FPGA
@ Lattice
Embedded SW Dev Engineer
@ Lattice
Embedded SW Dev Engineer
@ Lattice
SOC Design Engineer
@ Lattice
SOC Design Engineer
@ Lattice
SOC Design Engineer
@ Lattice
Staff SoC RTL Designer
@ Lattice
Staff SW Dev Eng
@ Lattice
Staff EDA Engineer โ RTL Front End Tools & Methodologies
@ Lattice
SW QA Engineer
@ Lattice
Staff SW Dev Eng
@ Lattice
Senior Director Analog IC Design
@ Lattice
Sr. Staff RTL Eng
@ Lattice
Senior Analog IC Design Engineer
@ Lattice
Analog Design Engineer 4
@ Lattice
Sr. Embedded Software Engineer
@ Lattice
Staff SoC RTL Designer
@ Lattice
HDL Design/Verification Engineer
@ Lattice
Staff EDA Engineer โ RTL Front End Tools & Methodologies
@ Lattice
Senior Staff SW Dev Engineer
@ Lattice
Senior Applications Engineer โ FPGA Tools
@ Lattice
Senior Director Analog IC Design
@ Lattice
Sr. Staff RTL Eng
@ Lattice
Senior Embedded Software Engineer
@ Lattice
Sr. Embedded Software Engineer
@ Lattice
Senior Analog IC Design Engineer
@ Lattice
Analog Design Engineer 4
@ Lattice
Sr Staff / Principal Engineer โ FPGA Circuit & Behavioral Modeling
@ Lattice
Sr / Staff Custom Memory Design Engineer โ SRAM & FPGA CRAM
@ Lattice
Silicon Bring-Up & Validation Engineer โ Next-Gen FPGA
@ Lattice
Analog Design Engineer 4
@ Lattice
Senior Analog IC Design Engineer
@ Lattice
HDL Design/Verification Engineer
@ Lattice
Senior Analog IC Design Engineer
@ Lattice
Analog Design Engineer 4
@ Lattice
Staff EDA Engineer โ RTL Front End Tools & Methodologies
@ Lattice
Embedded Software Intern
@ Lattice
Embedded Software Intern
@ Lattice
Senior Director Analog IC Design
@ Lattice
Sr. Staff RTL Eng
@ Lattice
Principal Engineer โ UI Architect
@ Lattice
Principal RTL Engineer โ FPGA Debug & EDA Architecture
@ Lattice
Senior Director โ IC Design
@ Lattice
Sr.Staff RTL Eng
@ Lattice
Staff / Lead Engineer - FPGA Systems Applications Engineering
@ Lattice
FPGA SW Tool Intern
@ Lattice
Rtl / Digital Design Engineer
@ Lattice
Robotics and Humanoid Business Development
@ Lattice
Applications Engineer โ FPGA Tools
@ Lattice
Senior Embedded Software Engineer
@ Lattice
Sr. Embedded Software Engineer
@ Lattice
SW Development Engineer
@ Lattice
Senior QA Engineer โ FPGA Place & Route Validation
@ Lattice
Staff SoC RTL Designer
@ Lattice
Analog Design Engineer 4
@ Lattice
Senior Analog IC Design Engineer
@ Lattice
Embedded Firmware Engineer
@ Lattice
SW Development Engineer
@ Lattice
Design Verification Engineer
@ Lattice
Sr Design Verification Engineer
@ Lattice
Analog Design Engineer
@ Lattice
SW QA Engineer โ FPGA Timing & Hardware Testing
@ Lattice
HDL Design/Verification Engineer
@ Lattice
Senior Design Verification Engineer
@ Lattice
SoC RTL Designer
@ Lattice
Staff SoC RTL Designer
@ Lattice
Staff Design Verification Engineer
@ Lattice
Principle RTL Engineer
@ Lattice
Sr Engineer - RTL Design
@ Lattice
Embedded Engineer
@ Lattice
Engineer - RTL Design
@ Lattice
Engineer - Firmware Design
@ Lattice
Soft SOC Design and Integration Engineer
@ Lattice
Senior Staff RTL/Integration Design Engineer
@ Lattice
Senior Staff Analog Design Engineer
@ Lattice
Senior Staff Analog Design Engineer
@ Lattice
SoC RTL Designer
@ Lattice
Soft SOC Design and Integration Engineer
@ Lattice
Staff Design Verification Engineer
@ Lattice
Design Verification Engineer
@ Lattice
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Lattice designs low-power FPGAs and programmable logic devices, serving markets such as communications, automotive, and industrial automation from its headquarters in Hillsboro, Oregon. The Lattice Nexus and MachXO families are key products that enable efficient processing and connectivity in edge applications. Engineering disciplines include digital design, analog design, and verification, focusing on optimizing power consumption and performance in embedded systems. With a commitment to innovation, Lattice employs a diverse team of engineers who tackle challenges in SoC design and integration, ensuring robust solutions for a wide range of applications.
Lattice currently has 34 active embedded systems positions spanning 5 countries. All positions are on-site, typical for hardware-focused roles requiring lab access and equipment. Recognized as a top-tier employer (85.0/100), Lattice offers competitive compensation and strong career development paths in embedded engineering.
* Data represents job posting activity over the past 6 months: Feb 2026 through Jul 2026
Lattice's hiring pace has moderated recently (7 openings this month vs 32 last month),
which is common after major hiring pushes or as projects move from development to deployment phases.
Over the past 6 months, Lattice averaged 10.0 job postings per month,
with peak hiring in Jun 2026 (32 openings).
For embedded systems roles, hiring activity typically correlates with product development cycles,
especially for firmware teams during pre-production phases and hardware engineers during prototyping.
๐ -78% change
Consistent hiring velocity
Jun 2026
FPGA is the most in-demand skill at Lattice,
appearing in 67% of all job listings (past and present).
This skill is important but not universal, indicating diverse technical needs across different product lines or teams.
Lattice's technology stack spans 99 distinct skills and tools,
reflecting the multifaceted nature of embedded systems development.
The broad technical diversity (99 technologies) suggests work on complex,
multi-domain projects requiring both hardware and software expertise.
Engineers joining Lattice should combine depth in key areas with adaptability. The mix of hardware skills (PCB design, schematics) and firmware expertise (RTOS, embedded C) indicates full-stack embedded development where engineers work across the hardware-software boundary. Candidates with adjacent skills (version control, testing frameworks, communication protocols) typically advance faster by contributing across the development lifecycle.
Lattice's primary hiring focus is Embedded Software Engineer with
7 open positions. High-volume recruitment for a single role type typically indicates
either a growing team building similar capabilities or a newly formed department scaling rapidly.
Multiple openings in the same discipline create advantages for new hires:
stronger peer support networks, established onboarding processes, and clearer career progression paths
as the team matures. Engineers often find collaborative environments more conducive to professional growth.
Experience level distribution: 85% of openings target senior-level engineers.
Lattice operates across 7 countries with 15
total hiring locations. Multi-geography recruitment typically indicates either distributed engineering teams,
expansion into new markets, or proximity to manufacturing and customer operations.
Penang, Malaysia serves as a primary hiring hub with 21% of all roles
(18 positions).
Engineering capabilities are distributed relatively evenly across locations, suggesting a
genuinely multi-site development model rather than a single headquarters-centric approach.
These employers share technical focus areas with Lattice and are actively hiring embedded engineers. Exploring multiple companies helps candidates understand market compensation, compare technical challenges, and identify the best cultural and technical fit for their career goals.
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