Staff SW Dev Eng

Lattice 

📍 Taman Pulau Pinang, Malaysia 🇲🇾

full-time
senior
Posted —

Key Skills

FPGAC++PythonSystemCEDA

Industry

SemiconductorConsumer Electronics

Job Description

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description

We are seeking talented Software Engineers to join a growing Software Team to develop new FPGA solutions for Lattice customers. If you are passionate about:

  • Working with complex device data modeling
  • Building customer facing tools (Bitgen, IBIS, SSN, Power Calculator).
  • Collaborating with world class engineers to innovate solution everyday
  • Solving complex FPGA HW-SW modeling challenges
  • Building and testing solution in both SW and RTL simulation environment
  • Being part of a fast-paced FPGA design company

Join us and be part of the winning team to maintain Lattice low-power FPGA leadership in the industry!

Key Responsibilities

  • Build detailed software models of Lattice FPGA devices (e.g., Avant, Certus, MachXO) including logic cells, IO blocks, PLLs, and routing fabrics
  • Collaborate with toolchain developers to integrate models into synthesis, place-and-route, and timing analysis tools
  • Translate technical specifications and hardware datasheets into actionable design models
  • Simulate device-level behavior to validate functional correctness
  • Implement configuration and bitstream handling models for programming
  • Provide detailed documentation and interface guidelines for engineers and stakeholders

Required Qualifications

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science
  • Strong grasp of FPGA architecture, device internals, and digital design principles
  • Proficiency in C++, Python, or SystemC for hardware-software modeling
  • Experience with FPGA families and their proprietary or open-source toolchains
  • Familiarity with modeling languages and techniques (RTL abstraction, structural modeling, etc.)
  • Knowledge of EDA flow components — synthesis, PnR, timing analysis, and simulation
  • Industrial experience in similar field for > 8 years.

Additional Information

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

Malaysia

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.