There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.
Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.
Job Description:
Job Description
We are looking for a highly skilled and experienced Software QA Test Engineer to join our dynamic team. The ideal candidate will possess a robust background in validating software tools along with proficiency in Verilog, System Verilog and VHDL. You will play a pivotal role in the verification in our software tools and foundation IP using cutting edge methodologies and tools.
Responsibilities:
Validate FPGA design flows (compilation, simulation, power, timing, bit stream) that are closely integrated with FPGA IP Develop, maintain and enhance test plans for FPGA IP blocks and software verification tools. Write and execute test cases for functional and performance verification of FPGA IP blocks Validate FPGA IP catalog to ensure intuitive and error-free to user interfaces Analyze coverage metrics and refine test scenarios to achieve coverage goals. Review, collaborate and analyze feature requirements with stakeholders
Education:
Bachelor’s or Master’s degree in Electronic Engineering, Computer Science, Software Engineering, or related fields.
Experience:
12 years of experience in software/IP testing and quality assurance with a proven track record in IP block verification. Write and execute test cases for functional and performance verification of FPGA IP blocks Proficient in Verilog, System Verilog and VHDL. Knowing UVM is a plus. Good experience in Simulation/Verification using VCS, Questa, power, timing, IBIS analysis of FPGA design flows. Knowledge in FPGA architecture and silicon features such as SERDES and DDR is a plus. Familiarize with GUI testing platform and tools such as Squish is a plus Independence and Autonomy: The ideal candidate should be capable of working independently and provide technical code review with junior engineers. This self-reliance is essential for efficiently executing tasks and contributing effectively to our team.
Soft Skills:
Additional Information:
This position requires a successful background and reference checks and satisfactory proof of your right to work in:
MalaysiaLattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.
Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.