Senior FPGA Engineer

🏢 Company: Sauvira Solutions Private Limited

📌 Role: Senior FPGA Engineer

📍 Location: Bengaluru, India

🧑‍💼 Experience: 8+ Years

⚡ Notice Period: Immediate to 15 Days

Sauvira Solutions Private Limited is a trailblazing semiconductor services at the forefront of India's semiconductor revolution. We provide comprehensive solutions in semiconductor design, verification, and testing — empowering businesses to innovate and thrive in the digital age.

We are looking for highly experienced Senior FPGA Design & Prototyping Engineers with strong hands-on expertise in FPGA architecture, RTL integration, and SoC-to-FPGA conversion. The ideal candidate will be a self-driven professional with a passion for solving complex hardware challenges and delivering high-quality silicon-ready designs.

FPGA Architecture & Design

• Define and implement FPGA architecture for complex digital designs
• Develop scalable and reusable FPGA-based design frameworks
• Perform resource optimization, timing closure, and power analysis

RTL Integration

• Integrate RTL IP blocks into FPGA platforms
• Ensure functional correctness through simulation and validation
• Collaborate with design and verification teams for seamless IP integration

Vivado Tool Flows

• Manage end-to-end Vivado design flows including synthesis, implementation, and bitstream generation
• Optimize design constraints (XDC) for timing and performance
• Perform utilization and timing analysis reports

FPGA Debugging & Validation

• Debug FPGA designs using ILA, VIO, and other Xilinx debug tools
• Perform board bring-up, hardware validation, and system-level testing
• Identify and resolve functional and timing issues on hardware

SoC-to-FPGA Conversion

• Map SoC designs onto FPGA prototyping platforms
• Partition large SoC designs across multiple FPGAs
• Validate SoC functionality on FPGA before tape-out

• 8+ years of hands-on experience in FPGA development and prototyping
• Strong proficiency in RTL design using Verilog / SystemVerilog / VHDL
• Deep expertise in Xilinx Vivado design suite and flows
• Proven experience in SoC-to-FPGA conversion and multi-FPGA partitioning
• Strong understanding of FPGA architecture — LUTs, BRAMs, DSPs, PLLs, I/O blocks
• Experience with FPGA debug tools — ILA, VIO, ChipScope
• Familiarity with AXI, AHB, APB bus protocols
• Experience with high-speed interfaces — DDR, PCIe, Ethernet, UART, SPI, I2C
• Ability to work independently and deliver under tight timelines

• B.E. / B.Tech / M.Tech in Electronics, VLSI, Electrical Engineering or equivalent