📍 Bengaluru, Malaysia 🇲🇾
C MeyvnSystems is Hiring – Design Verification Engineers (Malaysia)
We are looking for Design Verification Engineers with strong experience in:
✅ PCIe (Mandatory)
✅ Verilog / SystemVerilog
✅ UVM
✅ IP / SoC Verification
Experience : 5years to 10Years
📍 Location: Malaysia
⏳ Notice Period: Immediate to 30 days
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