NVIDIA MMPLEX DLA(Deep Learning Accelerator) and PVA (Programmable Vision Accelerator) teams are looking for a Senior ASIC Digital Design Engineer. In this role, you will work closely with the architecture and verification engineers to define, implement, and verify the good quality of DLA/PVA IP. DLA/PVA IPs are used in multiple chips, like Tegra, auto mobile, client, etc, which are used in NVIDIA products around the world.
What You Will Be Doing
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Co-work with the architect to define module architecture/micro-architecture.
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Building for NVIDIA next next-generation IPs
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Involved in the entire ASIC flow.
What We Need To See
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BS/MS in electrical/computer engineering and related.
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3+ years experience in ASIC design. Strong design/implementation skills in Verilog. Solid understanding in timing/power optimization skills of digital design.
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Perl scripting skills is appreciated as a plus.
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ImageProcessing/ComputerVision/Deep-Learning/CPU/GPU/DSP-related experience is a big plus.
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Professional AI application technology is a big plus
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Fluent English (both written and spoken) and excellent communication skills
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Demonstrated ability to work independently as well as in a multi-disciplinary group environment
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Proactive & team work
JR2004727