SOC/Subsystem/IP DV Engineer

Broadcom 

📍 Bengaluru, India 🇮🇳

full-time
senior
Expired
Posted —
This job posting has expired View All Design Verification Engineer Jobs

Key Skills

SystemVerilogUVMEthernetPCIeTcl

Industry

SemiconductorTelecommunications

Job Description

Job Description:

He/she should have strong knowledge of the following with 12-15 years of experience in IP/Subsystem/SoC Level Functional verification


  • Working experience in IP / Subsystem/ SoC verification
  • Expertise to develop verification environments using System Verilog and UVM
  • Expertise to develop BFMs / Checkers / monitors / Scoreboards
  • Must have developed block/system level verification plans and tests.
  • Must have capability to debug test failures to find the root cause.
  • Must have worked on code / functional coverage.
  • Experience in constrained random verification.
  • Domain skills: Ethernet/PCIe/HBM/CPU/SoC
  • Gate-level /SDF simulations
  • Knowledge of scripting languages like Perl, Tcl
  • Flexible to work in any IP/Subsystem/SoC projects


CAD Tools: Cadence/Synopsys

Education Qualification: Bachelors/Master’s in Electronics/Computer Engg

R024683