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Altera

Graduate Talent - SOC FCT Design Engineer

Altera

📍 Penang, Malaysia 🇲🇾

contract

entry-level

Posted —

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Key Skills

STA FPGA DFT timing analysis

Industry

Semiconductor Automotive

Job Description

Job Details

Job Description:

Successful candidate will be involved in all aspects of STA .
Candidate needs to work with Frontend, DFT and verification team to understand design definition and requirement and provide feedback on timing and physical challenges.
As a FPGA FC Timing design engineer candidate will be responsible for timing closure and signoff of FPGA/SoC and Subsystem timing.
Candidate will be involved in static timing analysis, providing/deriving interface timing constraints to partitions and doing final timing signoff.
Candidate will also work closely with design and architecture team for timing convergence analysis and will also work with physical design team for timing closure

Qualifications

BE/MS/Phd in Electronics/Electrical Engineering with keen interest in physical design, timing and physical integration.
Candidate should be strong in communication, problem solving, analytical skill and attitude to learn and perform.

Job Type

Contract Employee (Fixed Term)

Shift

Shift 1 (Malaysia)

Primary Location:

Penang 15, Penang, Malaysia

Additional Locations:

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.