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Fpga Design Engineer

Globex Digital ↗

📍 Hyderabad, India 🇮🇳

full-time

mid-level

Expired

Posted —

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Key Skills

FPGARTLSTAVerilogSystemVerilog

Industry

TelecommunicationsConsumer Electronics

Job Description

Hiring for a FPGA Design Engineer

Experience: 5-15 Years

Location: Bangalore / Hyderabad

Notice Period: Immediate 20 Days

Band: B2 / B3 / C1

Employment Type: Full-time

Job Description

We are looking for a skilled FPGA Design Engineer with strong expertise in RTL design, FPGA design flow, timing, and debugging . The ideal candidate will work on high-speed FPGA designs, perform RTL quality checks, and collaborate closely with validation and system teams to deliver robust FPGA solutions.

Key Responsibilities

Work on complete FPGA design flow including RTL coding, synthesis, place route, and STA
Develop and maintain RTL code using Verilog/SystemVerilog
Perform RTL quality checks such as Lint, CDC, and RDC
Create and manage timing and design constraints
Debug FPGA designs using inbuilt logic analyzers
Work on high-speed and complex logic designs
Review and support design documentation for FPGA validation teams
Collaborate with cross-functional teams following Agile methodologies

5 Mandatory Skills

FPGA Design Flow RTL Coding (Verilog / SystemVerilog)
RTL Quality Checks Lint, CDC, RDC
STA Constraints (Timing, Clocking, PR)
FPGA Debugging using Inbuilt Logic Analyzers
FPGA Tools Lattice Radiant (Must), Intel, Xilinx/AMD

Required Technical Skills

Strong understanding of FPGA device architecture and clock structures
Experience with high-speed FPGA designs
Good knowledge of bus protocols : AXI, AHB, APB, AvMM
Knowledge of slow-speed protocols : I2C, SPI, UART, MDIO
Experience with PCIe IP usage
Knowledge of error detection and correction techniques
Familiarity with basic Zynq design flow

Good to Have

Experience in Telecommunication domain (5G, Radio Subsystems, AMS)
Basic scripting knowledge (Make, Perl, Shell, Python)
Knowledge of Agile methodology and Git

If you have strong hands-on experience in FPGA RTL design, timing, and debugging and enjoy working on high-speed, complex FPGA systems, wed be happy to have you apply and join our engineering team.

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