Design Verification Engineer

Proxelera is India’s premium chip and system software product engineering partner. Our engineers take extreme passion in your assignments and deliver through their years of high quality experience to make your product successful. We understand the challenges of all aspects of product engineering – right from design planning stage to post silicon work. We also offer you unparalleled quality of service in productization of your chip through reference system design and system software development.

We are looking for an experienced Design Verification Engineer with 5–6 years of hands-on experience in verifying complex digital designs.

The candidate will be responsible for developing verification environments, creating test plans, and ensuring functional correctness of RTL designs.

Key Responsibilities:

• Develop and execute verification plans based on design specifications.
• Build and maintain SystemVerilog/UVM-based verification environments.
• Write testcases, sequences, and scoreboards for functional validation.
• Perform functional, code, and toggle coverage analysis.
• Debug RTL issues and work closely with design engineers to resolve bugs.
• Develop assertions (SVA) for protocol and functional checks.
• Run and analyze regression suites and improve test quality.
• Participate in design and verification reviews. Support gate-level simulations (GLS) and low-power verification (if applicable).