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IBM

Design Verification Engineer

IBM

📍 Hyderabad, India 🇮🇳

full-time

mid-level

Posted —

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Key Skills

SoC Verilog VHDL C++ Python

Industry

Semiconductor Computer Engineering

Job Description

Introduction

As a CPU Processor Verification Engineer , you’ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in today’s market

Your Role And Responsibilities

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering.
Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment.
Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU.
Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments.
Develop verification test plan for both functional and performance verification including the estimation for coverage closure. * Support higher level core/system simulation environment.
Participate in post silicon lab bring-up and validation of the Hardware.
Lead , guide ,mentor a team of engineers and represent them at global forums.
Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement.
Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members.
Hands-on on Power Management domain

Preferred Education

Bachelor's Degree

Required Technical And Professional Expertise

4+ years of experience in Design Verification - demonstrated execution experience of verification of logic blocks
Strong in SoC verification : Chip reset sequence and initialization for SoA
Knowledge of verification (any) methodology, Knowledge of HDLs (Verilog, VHDL)
Good programming skills in C/C++, Python/Perl
Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails
Hardware debug skills backed by relevant experience on projects
Exposure in developing testbench environment, write complex test scenarios
Good communication skills and be able to work effectively in a global team environment
Drive verification coverage closure