Analog Design, Staff Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a dedicated and innovative Analog and Mixed-Signal Design Engineer with a passion for pushing the boundaries of technology. You thrive in a collaborative environment and are committed to delivering high-quality designs that power the next generation of datacenters, automobiles, and communications networks. With a solid foundation in CMOS analog and mixed-signal circuit design, you are adept at working with the latest FINFET CMOS technology nodes. You have a keen eye for detail and excel in circuit-level and system-level PLL design. Your strong analytical skills and hands-on experience with tools such as Hspice, Finesim, and Synopsys Custom Designer enable you to tackle complex design challenges and contribute to groundbreaking innovations.

What You’ll Be Doing:

• Designing and modeling PLL circuits at both system and circuit levels.
• Developing analog circuits including VCOs, charge pumps, and voltage regulators.
• Custom designing circuits in deep-submicron and FINFET CMOS technologies.
• Creating high-speed digital circuits such as dividers and clock distribution paths.
• Performing schematic entry and spice simulation of custom circuits.
• Collaborating with cross-functional teams to optimize design performance and reliability.
  
  

The Impact You Will Have:

• Enabling the advancement of high-speed communication technologies with your innovative designs.
• Contributing to the development of next-generation datacenters, enhancing their performance and efficiency.
• Driving the evolution of automotive technology through advanced PLL designs.
• Supporting the creation of communication networks that handle data rates up to 224Gbps and beyond.
• Enhancing the reliability and performance of Serdes designs for applications like PCI-Express and Ethernet.
• Collaborating with a team of experts to push the boundaries of what’s possible in analog and mixed-signal design.
  
  

What You’ll Need:

• MSEE with 2+ years or PhD with 1+ year experience in CMOS analog and mixed-signal circuit design.
• In-depth knowledge of PLL loop operation and design.
• Experience with designing PLL circuit components such as VCOs, charge pumps, and regulators.
• Proficiency in designing high-speed digital circuits and working with deep-submicron and FINFET CMOS technologies.
• Expertise in using Hspice, Finesim, or similar spice-type simulators.
• Experience with schematic entry in Synopsys Custom Designer or similar tools.
• Knowledge of digital timing in PrimeTime and/or Nanotime is an asset.
  
  

Who You Are:

• Detail-oriented with strong analytical and problem-solving skills.
• Innovative and creative in your approach to design challenges.
• Effective communicator, able to collaborate with cross-functional teams.
• Adaptable and eager to learn new technologies and methodologies.
• Proactive and able to work independently with minimal supervision.
  
  

The Team You’ll Be A Part Of:

You will join a dynamic and collaborative PLL design team that is at the forefront of analog and mixed-signal design innovations. Our team is dedicated to pushing the limits of technology to develop cutting-edge solutions for high-speed communication networks, datacenters, and automotive applications. Together, we strive to deliver high-performance designs that meet and exceed industry standards.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.