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Master/Bachelor's Degree in Electrical/Electronic Engineering
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Experience 8-12 Years in high performance digital logic designs and SoC Integration using ARM Cores, Bus Protocols and Interconnects
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Building Subsystems and/or SoC RTL integration
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LINT/CDC/RDC signoffs for the highest design quality
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Perform all aspects of the SoC design flow from high level design to Synthesis
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Experience with Synopsys VCS or Cadence RTL simulator, Design Complier (DC) or RTL Compiler (RC or Genus), Verdi Debugging tool
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ISO26262 based functional safety relevant microcontroller architectures is preferred
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Conducting IP Integration reviews, BE reports reviews for concurrent engineering
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Self-motivated to drive issues to closure.
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Excellent written and verbal communication skill
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Creative problem-solving skills, logic analysis skills, ability to logically break complex problems down to manageable components,
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