SoC Design Director

SoC Design Director

Top30 Semiconductor Organization in the world

Bangalore

Role Overvie

w
We are seeking a Digital Design professional with deep expertise in high-performance controller and bridge design, micro-architecture, RTL implementation, and IP integration. The ideal candidate will play a critical role in the development of cutting-edge connectivity solution

s.

Key Responsibili

• ties
  Design and implement high-performance digital solutions, including RTL development and synth
• esis.Collaborate with cross-functional teams on IP integration for processor IPs and periph
• eralsDeep knowledge of processor boot process and peripheral implementation with boot firmware in
• mindOwn block-level and full-chip designs from architecture to GDS, focusing on designs at nodes ≤
• 16nm.Ensure timing closure, assess verification completeness, and oversee pre- and post-silicon d
• ebug.Utilize tools from Synopsys/Cadence to ensure first-pass silicon success and apply expertise in UVM-based verification

flowsBasic Qualifications / Experience

• Level
  Bachelor’s in Electronics/Electrical engineering (Master's prefe
• rred).Minimum 20+ years of digital design experience, with focus on processor, peripherals and full chip implement
• ation.Proven expertise in RTL development, synthesis, and timing cl
• osure.Experience with front-end design, gate-level simulations, and design verific
• ation.Strong work ethic, ability to handle multiple tasks, and a proactive, customer-focused att

itude.
Required Ex

pertise
Proven expertise in micro-architecture development and RTL development for block level and full-chip designs at advanced

nodes (Experience with front-end design, gate-level simulations, and supporting design verification through multiple ASIC T/O

cycles .Hands-on experience with processor IP (

ARM/ARC)Experience of working on PCIe is

a must.Hands-on pre-silicon and post-silicon implementing peripherals for I2C/

SPI/UARTHands-on experience with complex DMA engines and FW inte

raction.Strong proficiency in System Verilog/Verilog and scripting (Pytho

n/Perl).Experience with block-level and full-chip design at advanced nodes (

≤ 16nm).Silicon bring-up and post-silicon debug exp

erience.Familiarity with industry standard simulation, debug, quality checking and synthesis tools Synopsys/Cadence tools and UVM-based design verif

ication.Strong work ethic, ability to handle multiple tasks, and a proactive, customer-focused a

ttitude.

Preferred

• Experience
  Knowledge and experience implementing secure boot and security mechanisms like authentication and attestation
• is a plus.Knowledge of system-level design with ARM/ARC/RISC-V processors
• sub systemsExperience of working on PCIe/UAL is
• a big plus.Understanding of PAD design, DFT, and floo
• r planning.Experience in synthesis, and timing closure is
• a big plus.Experience with NIC, switch, or storage product d
• evelopment.Familiarity with working in design and verification workflows in a CI/CD e

nviro

nment.Skilsmicroa

rchitecture"rtl design" / "RTL coding" /"RTL D

evelopmen

t"Synthesis"timi

ng

clo

sure

"ARMARC

PCIeVerilogSystemVe

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Contact:UdayMulya

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