SoC ASIC Design Engineer

Frontier of On-device AI Semiconductors

for Everyone, Everywhere

About DeepX Co., Ltd .

DEEPX is a forward-thinking Series D startup architecting the infrastructure for the Physical AI era.

By delivering the world’s most energy-efficient NPU technology, we are solving the critical power and heat challenges of Generative AI to bring super-intelligence to every device, everywhere.

Our global leadership is validated by our record-breaking recognition as a multi-year CES Innovation Award honoree (2024 & 2026) and being named the 2024 Frost & Sullivan Company of the Year in the NPU sector. With an enterprise value approaching 1 trillion KRW, DEEPX offers a unique pre-IPO

opportunity to join a market leader defining the new industry standard for the $70B AI semiconductor market.

We are currently scaling toward mass production of our flagship DX-M1 (Samsung 5nm) with over 50 global projects scheduled, while engineering next-generation 2nm solutions to support 100B parameter Large Language Models (LLM) at the edge. ☞ Link

★ If you want to be part of world-class innovation? Please talk with us.

★Explore our journey: The DEEPX White Paper ☞ Link

Responsibilities

□ SoC ASIC Design (Focused on AI Hardware Processor Design and Development)

Qualifications

□ RTL design using Verilog/SystemVerilog

□ SoC design using ARM Core, AMBA bus, and interconnect

□ Design of bus interfaces for AMBA architectures such as AXI

□ SoC top-level integration and verification

□ Experience with EDA tools for RTL simulation and synthesis

□ Proficient in Linux, shell scripting, Tcl, Python, and Perl

□ In-depth understanding and experience with Clock Domain Crossing (CDC)

Preferred Qualifications

□ Experience with RTL synthesis, Static Timing Analysis (STA), CDC checks, Lint, formal verification, and back-end design support

□ Design experience with system-level CDC-free Clock Generation Units (CGU) and Reset Generation Units (RGU)

□ Extensive experience with ECO (Engineering Change Order) processes

□ Hands-on experience with mass production and chip bring-up of ASIC, SoC, or Application Processors

□ Experience supporting FPGA prototyping

□ Experience with integration of PCIe, USB, and LPDDR/DDR 4/5

□ Knowledge of artificial neural networks and deep learning