Senior RTL Design Engineer

Synopsys Inc 

📍 Bengaluru, Karnataka, India, India 🇮🇳

full-time
senior
Expired
Posted —
This job posting has expired View All RTL Design Engineer Jobs

Key Skills

RTLVerilogFPGAEDAPython

Industry

SemiconductorConsumer Electronics

Job Description

We are seeking an experienced, highly motivated and high-caliber individual with below expertise. Does this sound like a good role for you?


  • Sr Staff RTL Design Engineer (R&D engineering)
  • Location: Bengaluru
  • Experience: 9yrs to 15yrs
  • BSEE with 9 years of relevant experience OR MSEE with 8 years of relevant experience.
  • Expertise in RTL development using Verilog or System Verilog, with a strong background in digital design principles.
  • Hands-on experience with Xilinx and Altera FPGA platforms, including familiarity with Xilinx Vivado and related tools.
  • Proficiency in developing large, complex EDA software and managing the full design flow from concept to lab bring-up.
  • Advanced problem-solving and debugging skills, especially in digital verification, emulation, and prototyping environments.
  • Experience with scripting languages such as Tcl, Python, Perl, and a solid understanding of system and CPU architecture (DMA, interrupts, etc.).
  • Exposure to embedded system development and interface protocols (USB, PCIe, DDR, AXI).
  • Responsibilities:
  • Designing and developing advanced FPGA-based prototyping solutions, integrating both hardware and software components.
  • Leading the digital design process for Xilinx and Altera FPGAs, utilizing tools such as Xilinx Vivado to optimize workflows.
  • Driving all phases of the project lifecycle, including requirements gathering, development, implementation, and test case creation.
  • Developing and maintaining complex EDA (Electronic Design Automation) software for high-performance prototyping systems.
  • Implementing digital debug, verification, emulation, and prototyping strategies to ensure robust and reliable designs.
  • Creating RTL for interfaces such as USB, PCIe, DDR, and AXI, and overseeing full design flow including verification and lab bring-up.
  • Exploring and implementing new approaches to address current and future challenges, continuously learning and applying new technologies.
  • Mentoring junior engineers, providing guidance and support to foster growth and technical excellence within the team.


Please share your updated CV with [email protected] or refer those who would like to explore this opportunity.


  • Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, gender identity, age, military veteran status, or disability.