Senior IC Design Engineer
Palma Ceia SemiDesign ↗
📍 South Australia, Australia 🇦🇺
full-time
senior
Expired
Posted —
This job posting has expired
View All Analog Design Engineer Jobs
Key Skills
ICRFDACPLLADC
Industry
SemiconductorTelecommunications
Job Description
Required
Palma Ceia Joins Wi-Fi Alliance®
- Deep experience in IC design leading to production, production debug, testing support and yield enhancement
- Experience with RF system architectures, link budgets, trade-offs for key elements such as DC offset calibration loop, IIP2 calibration loop, AGC, etc.
- RF or analog circuit design for WiFi, LTE, TV or other high dynamic range systems
- Implementation experience in either 65nm or 40nm
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At least 7 years at a relevant comm IC house or IDM
- Experience with leading a team from design concept through project completion
- Lab and testing experience: spurious debug, noise testing, performance testing
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Customer-facing exposure: determining specifications, schedule, technical trade-offs
- LNA, Mixer, VGA, PA driver, IQ modulatorActive filter design,
- Active filter design, high speed op-amp, log limiter amplifiers, power detectionPLL, integer/fractional loops, PFD,
- PLL, integer/fractional loops, PFD, high speed divider circuits, VCO, loop filter, PLL system analysis, timing analysis, pre-scalers,High speed DAC design, above 10 bit, above 300MSPS
- High speed DAC design, above 10 bit, above 300MSPSHigh speed ADC design, (one of or all — pipeline,
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High speed ADC design, (one of or all — pipeline, SAR and CTSD), above 10 bit, above 80MSPS
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McKinney, Texas (preferred)
- Start Date: Immediate
- Email resumes to: [email protected].
-
No calls. EOE.
Palma Ceia Joins Wi-Fi Alliance®
Companies Hiring Analog Design Engineer
Key Skills
ICRFDACPLLADC
Industry
SemiconductorTelecommunications
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