RTL SOC Integration Engineer

We are seeking an experienced RTL SoC Design Engineer with 8+ years of experience in digital design and SoC development. The ideal candidate will have strong expertise in RTL design, microarchitecture, SoC integration, and industry-standard bus protocols. The candidate will be responsible for designing high-performance digital IPs, collaborating with cross-functional teams, and driving projects from specification through silicon bring-up.

• Design and develop RTL for complex digital blocks and SoC subsystems using Verilog/SystemVerilog.
• Translate architecture and functional specifications into robust microarchitecture and RTL implementation.
• Lead the development of high-performance, low-power, and area-efficient digital designs.
• Perform SoC integration including CPU, memory subsystems, peripherals, and interconnects.
• Work closely with architecture, verification, physical design, DFT, firmware, and validation teams.
• Develop design documentation, interface specifications, and implementation guidelines.
• Debug RTL issues using simulation, waveform analysis, and lint/CDC reports.
• Support synthesis, timing closure, power optimization, and design sign-off activities.
• Participate in design reviews and ensure compliance with coding standards and quality metrics.
• Mentor junior engineers and provide technical leadership across projects.

• 8+ years of experience in RTL Design and SoC development.
• Strong knowledge of Verilog and SystemVerilog.
• Experience with RTL coding, synthesis, lint, CDC, and static analysis.
• Good understanding of digital design fundamentals:
• FSM design
• Pipelines
• Clock domain crossing
• Reset synchronization
• Low-power design concepts
• Hands-on experience with SoC integration.
• Strong knowledge of AMBA protocols:
• AXI
• AHB
• APB
• Experience with memory interfaces such as SRAM, ROM, and DDR (preferred).
• Familiarity with scripting using Tcl, Python, Perl, or Shell.
• Experience with version control systems such as Git or Perforce.
• Good debugging skills using simulation tools (VCS, Xcelium, QuestaSim, etc.).
• Strong analytical and problem-solving abilities.

• Experience with ARM-based SoCs or RISC-V platforms.
• Knowledge of DFT concepts including scan, MBIST, and JTAG.
• Familiarity with low-power methodologies such as UPF/CPF.
• Experience with high-speed interfaces such as PCIe, USB, Ethernet, MIPI, or UCIe is an advantage.
• Exposure to FPGA prototyping is desirable.
• Experience with automotive, AI/ML, networking, or multimedia SoCs is a plus.

• Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, or a related field.

• Strong communication and collaboration skills.
• Ability to independently own and deliver complex design modules.
• Experience mentoring junior engineers.
• Ability to work effectively in a fast-paced, cross-functional environment.