Principal ASIC Design Verification Engineer

At Groq, we radically simplify computations to accelerate workloads in artificial intelligence, machine learning, and high-performance computing.

Why join Groq? You want to be a part of something groundbreaking, where every day you can see the impact of your work on Groq’s technology and customer solutions. As a Groqstar, you will join a talent-rich group of problem solvers and doers; in a culture that focuses on team, growth, innovation, and creativity. Simply put, at Groq, we defy gravity.

We are changing as the world changes and have evolved to a remote first company. Some roles may require being located near our primary sites, which will be indicated in the job description. We offer a competitive salary & benefits package, numerous quality-of-life perks such as a home office stipend, flexible learning allowance, optional professional coaching and a schedule of fun team activities.

Are you ready to join our crew and help us reimagine machine learning and AI at scale?

If so, we look forward to connecting with you!

About This Role

Groq is a machine learning systems company building easy-to-use solutions for accelerating artificial intelligence workloads. Our work spans hardware, software, and machine learning technology. We are seeking an exceptional Design Verification Engineer who is interested to join our Hardware team. You will work closely with internal interdisciplinary teams to drive key aspects of ASIC verification. This is a dynamic fast-paced environment requiring hands-on involvement. You must be responsive, flexible and able to succeed within an open collaborative peer environment.

Responsibilities & Opportunities In This Role

• Verify hardware features of Language Process Unit (LPU).
• Collaborate within the Hardware Team to design and verify features on LPU chips in simulation, emulation and silicon.
• Develop and implement advanced verification environments and methodologies for complex ASIC designs.
• Implement and optimize automated verification flows to improve productivity and efficiency.
• Utilize formal verification techniques to rigorously verify critical design properties and ensure compliance with specifications.
• Stay updated on the latest trends and advancements in ASIC design verification and incorporate innovative techniques into the verification process.
• Support silicon bring-up and debug.
• Be a productivity multiplier. Contribute to identifying and adopting engineering best practices within the verification team and interactions with cross-functional teams at Groq.
• Innovate. Contribute to developing future verification strategies for validating future accelerator chips and hardware architectures for ML workloads.
  
  

Ideal Candidates Have/are

• Ability to build strong cross-functional team relationships
• Good written and oral communication skills; strong technical documentation skills
• Highly self-motivated and directed; self-confidence and self-starter
• Keen attention to detail
• Proven analytical and problem-solving abilities
• Ability to effectively prioritize and execute tasks in a high-pressure environment
• Experience working in a team-oriented, collaborative environment
  
  

At Minimum

Qualifications for this role:

• BS degree in electrical engineering, or related fields, or equivalent practical experience; advance degrees (MS or PhD) is a plus
• 15+ years design verification experience of building test benches environments and design verification processes
  
  

Highly Valued, Not Required

• Excellent verbal and written communication skills to clearly communicate concepts in written and verbal form to stakeholders.
• Experience in leading verification efforts for ASIC tape-outs
• Experience with building block and SOC testbench development
• Good familiarity with SystemVerilog and UVM
• Good familiarity with randomly constrained testing methodologies.
• Good familiarity with C/C++ reference models
• Good familiarity with power verification strategies and UPF
• Good familiarity with netlist simulation
• Good familiarity with DFT verification
• Good familiarity with formal verification flow and tools
• Experiences in FPGA/Emulator hardware prototyping
• Experience in Python and/or Perl scripting
• Knowledge of ASIC design flow
• Knowledge of applying machine learning to ASIC verification flow
• Knowledge of silicon bring-up, debug, and manufacturing ATE support
• Proven track record of delivering bug-free silicon
  
  

Attributes Of a Groqstar

• Humility - Egos are checked at the door
• Collaborative and Team Savvy - We make up the smartest person in the room together
• Growth and Giver Mindset - Learn it all versus know it all, we share knowledge generously
• Curious and Innovative - Take a creative approach to projects, problems, and design
• Passion, grit, and boldness - no limit thinking; fueling informed risk taking
  
  

Compensation: At Groq, a competitive base salary is part of our comprehensive compensation package, which includes equity and benefits. For this role, the base salary range is $375,500 to $441,800, determined by your location, skills, qualifications, experience and internal benchmarks. This range is specific to roles in the United States, compensation for candidates outside the USA will be dependent on the local market.

US Job Postings

This position may require access to technology and/or information subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). To comply with these requirements, candidates for this role must meet certain citizenship or residency criteria. Specifically, they must qualify as U.S. Persons for export control purposes (i.e., U.S. citizen, U.S. lawful permanent resident (Green Card holder), or a protected individual under 8 U.S.C.

• 1324b(a)(3) such as a refugee or asylee), or otherwise be eligible for an applicable export license.