Lead Engineer - Analog Design

Jd

Job Requirements

We got a heads-up that there is a requirement by Renesas Power BU for Analog Design Engineers with 5-7 Years of Experience

Location: Bangalore Onsite

Role Overview

JD for the same:

We are seeking an experienced Analog / PMIC Design Engineer (Contractor) to support ongoing power management IC design activities. The role involves schematic design, simulation, verification, and layout collaboration for analog and power circuits within complex mixed-signal ICs. The candidate will work closely with system and design teams to deliver high-quality designs on schedule.

Key Responsibilities

• Design and simulate analog/power management blocks such as LDOs, DC-DC converters (buck/boost/charge pump), bandgap references, bias circuits, comparators, and protection circuits.
• Define and refine block-level specifications in coordination with system and architecture teams.
• Perform transistor-level schematic design, PVT, corner, and Monte-Carlo analysis for robustness and yield.
• Guide and review analog layout for matching, parasitic optimization, and reliability.
• Conduct post-layout verification and support top-level analog/mixed-signal integration (AMS co-simulation).
• Prepare and maintain design documentation, simulation reports, and review materials.
  
  

Required Qualifications

• B.E. / B.Tech / M.Tech in Electrical / Electronics Engineering or related field.
• 5-7 years of experience in Analog / PMIC / Power IC design (CMOS or BiCMOS).
• Hands-on experience with Cadence Virtuoso, Spectre, and analog verification methodologies.
• Strong understanding of analog layout, matching, parasitics, and device reliability (ESD, latch-up).
• Proven track record of delivering analog designs independently and meeting project timelines.
  
  

Preferred Skills

• Experience with multi-output PMICs or system-level power architectures.
• Exposure to digitally controlled power circuits (I²C/SPI interfaces).
• Familiarity with DFMEA, DFT, and DFM methodologies.
• Effective communication and teamwork in cross-functional, multi-site environments
  
  

Work Experience

• Design and simulate analog/power management blocks such as LDOs, DC-DC converters (buck/boost/charge pump), bandgap references, bias circuits, comparators, and protection circuits.
• Define and refine block-level specifications in coordination with system and architecture teams.
• Perform transistor-level schematic design, PVT, corner, and Monte-Carlo analysis for robustness and yield.
• Guide and review analog layout for matching, parasitic optimization, and reliability.
• Conduct post-layout verification and support top-level analog/mixed-signal integration (AMS co-simulation).
• Prepare and maintain design documentation, simulation reports, and review materials.