Altera
๐Bengaluru, India ๐ฎ๐ณ
โฑ๏ธ full-time
๐งโโ๏ธ senior
on-site
Job Description:
Sr. Silicon Design Verification Engineer (on-site)
Performs functional logic verification of an integrated SoC to ensure design will meet specifications.
โข Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.
โข Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs.
โข Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests.
โข Collaborates and communicates with Architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features.
โข Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
โข Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage.
โข Maintains and improves existing functional verification infrastructure and methodology.
โข Absorbs learning from post-silicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products
Qualifications:
Minimal Qualification:
Candidate should have a BS, MS or PhD in Electrical or Computer Science Engineering or related field with 6+ years of technical experience.
Related technical experience should be in/with: Pre Silicon Validation/Verification.
OVM/UVM, System Verilog, constrained random verification methodologies.
Preferred Qualification
Design Verification with developing, maintaining, and executing complex IPs and/or SOCs.
The complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure).
Developing validation test suites and driving continuous improvement into existing validation test suites and methodologies.
Scripting experience with TCL/PERL/Python etc.,
Formal verification experience,
Experience in either Ethernet / PCIe / MACSEC / IPSEC protocols & FPGA architecture or FPGA prototyping
Job Type:
Regular
Shift:
Shift 1 (India)
Primary Location:
Bengaluru, Karnataka, India
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Senior Embedded Software Engineer
@ Embedd
At embedd.it, we power hardware-software integration in embedded devices. We turn fragmented semiconductor chip data into configurable digital twins, then deterministically generate code, tests, and documentation โ making integration faster, cheaper, and resilient to supply chain shocks.
Weโre looking for a true legend โ someone with abstract thinking and deep expertise in low-level software development. Youโll build vendor-agnostic tooling for MCU and peripheral integration to solve hardware-software integration once and for all. We work at the intersection of embedded systems, code generation, compilers, and machine learning. Itโs your chance to help redefine how low-level development is done.
embedd.it is a UK-based startup reinventing embedded development. Our platform transforms unstructured semiconductor data into structured digital twins, enabling automatic generation of drivers, tests, and documentation. We're building a single, traceable source of truth to make integration fast, vendor-agnostic, and future-proof.
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