Digital IC Design Engineer
Winbond ↗
📍 Hsinchu City, Taiwan 🇹🇼
full-time
mid-level
Expired
Posted —
This job posting has expired
View All ASIC Design Engineer Jobs
Key Skills
VerilogASICDFTAMBAPCIe
Industry
SemiconductorConsumer Electronics
Job Description
作為華邦的(竹北) Digital IC Design Engineer ，你將負責把關產品生產週期的每一道關卡，確保產品良率、性能及品質。工作內容包含：
【工作內容】
聘僱性質：全職
【條件要求】
學歷要求：大學
科系要求：電機電子工程相關 │ 資訊工程相關 │
相關經驗：5年以上
語言能力：英文 高級 │ │
管理責任：No
輪班需求：No
出差需求：3個月以下
外派需求：No
其他條件：
【工作內容】
- Responsible for design and development of digital ICs, including Verilog RTL coding, functional verification, and optimization.
- Participate in the complete ASIC design flow: specification, RTL design, synthesis, static timing analysis, and physical design handoff.
- Perform Design-for-Test (DFT) implementation, including scan insertion and MBIST, to support manufacturability and testability.
-
Support SoC integration, including bus protocols (AMBA) and high-speed interfaces (PCIe, SerDes).
聘僱性質：全職
【條件要求】
學歷要求：大學
科系要求：電機電子工程相關 │ 資訊工程相關 │
相關經驗：5年以上
語言能力：英文 高級 │ │
管理責任：No
輪班需求：No
出差需求：3個月以下
外派需求：No
其他條件：
- Experience with logic synthesis tools.
- Proficient in simulation tools (e.g., VCS) and verification methodologies.
- Experience collaborating with physical design teams; understanding of floor planning, place & route, and physical constraints.
-
Experience with advanced process nodes (preferably TSMC 16nm/7nm/5nm or similar)
Featured Opportunities
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Key Skills
VerilogASICDFTAMBAPCIe
Industry
SemiconductorConsumer Electronics
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