Architect- FPGA Design, PCIe Protocol

Synopsys is seeking a highly motivated Architect to join the Speed Adapter (SA) engineering team , part of our HW‑Assisted Verification (HAV) organization.

This role focuses on the development of Speed Adapter solutions that bridge real‑world, high‑speed interfaces with designs running on ZeBu™ emulation and HAPS® prototyping platforms.

Speed Adapters are a critical component of Synopsys’ In‑Circuit Emulation (ICE) and system‑level validation strategy, enabling customers to connect their pre‑silicon designs to real devices, testers, and hosts with high fidelity and performance.

Key Responsibilities

• Design, develop, and maintain Speed Adapter solutions for advanced protocols such as PCIe and CXL
• Implement protocol functionality on FPGA‑based platforms to bridge real‑world I/O with DUTs running at reduced speeds on emulation and prototyping systems
• Collaborate with IP, emulation, and prototyping teams to deliver end‑to‑end system‑level validation solutions
• Develop and debug RTL, firmware, and system‑level components for Speed Adapter products
• Support integration with ZeBu™ and HAPS® platforms, including example designs and reference flows
• Participate in customer escalations, root‑cause analysis, and solution delivery for complex system‑level issues
• Contribute to roadmap planning, feature definition, and technical differentiation versus competitive solutions

Required Qualifications

• 12 + years of relevant experience
• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
• Strong hands‑on experience with PCIe and/or CXL protocols
• Solid understanding of digital design, RTL development, and FPGA‑based systems
• Experience with system‑level validation, emulation, or prototyping environments
• Familiarity with high‑speed serial interfaces and real‑world I/O connectivity
• Strong debugging skills across RTL, firmware, and hardware/software boundaries
• Ability to work effectively in a cross‑geography, cross‑functional team

Preferred Qualifications

• Experience with ZeBu, HAPS, or other emulation/prototyping platforms
• Knowledge of additional protocols such as Ethernet, USB, UFS, or MIPI
• Exposure to ICE / Direct‑ICE or post‑silicon validation workflows
• Customer‑facing experience supporting complex system bring‑up and debug
• Experience working with FPGA high‑speed transceivers and board‑level interfaces

Why Join Synopsys Speed Adapter Team

• Work on industry‑leading system‑level validation technology used by top semiconductor and hyperscale customers
• Influence next‑generation protocols such as PCIe Gen6/Gen7 and CXL3.x/4.0
• Be part of a team that spans IP, emulation, prototyping, and real‑world connectivity
• Opportunity to work on differentiated, patent‑pending technologies not available from competitors
• Collaborate with global experts in hardware‑assisted verification