Bootstrap

OMNIVISION

Analog Layout Design Engineer

๐Ÿ“ŒSanta Clara, United States ๐Ÿ‡บ๐Ÿ‡ธ

โฑ๏ธŽ full-time

๐Ÿง™โ€โ™‚๏ธ junior

๐Ÿ’ฐ 100000

Description

Position Overview:

We are looking for a motivated and detail-oriented Junior Chip Top Layout Designer to join our image sensor analog layout team. This is an excellent opportunity for someone early in their career to gain hands-on experience in the physical design of advanced integrated circuits, particularly in the top-level layout of analog/mixed-signal or image sensor chips

Responsibilities

  • Assist in the top-level layout integration of analog/mixed-signal ICs or image sensor chips under the guidance of senior engineers.
  • Support floor planning, power grid planning, and signal routing across the chip.
  • Perform layout verification tasks including DRC, LVS, and ERC using industry-standard tools.
  • Collaborate with circuit designers and senior layout engineers to understand block-level requirements and integration constraints.
  • Help prepare layout documentation and support tape-out activities.
  • Learn and apply best practices in layout design for manufacturability, reliability, and performance.

Requirements

  • Bachelorโ€™s degree in electrical engineering, Microelectronics, or a related field.
  • Familiarity with IC layout tools such as Cadence Virtuoso or similar.
  • Basic understanding of CMOS technology and analog/mixed-signal layout principles.
  • Strong attention to detail and willingness to learn.
  • Good communication and teamwork skills.

Preferred

  • Internship or academic project experience in IC layout or physical design.
  • Exposure to layout verification tools like Calibre or Assura.
  • Basic scripting knowledge (e.g., SKILL, Python) is a plus

Annual base salary for this role in California, US is expected to be between $100,000 - $135,000. Actual pay will be determined on a number of factors such as relevant skills, education, experience, and the pay of employees in the similar role.

EOE/Minorities/Females/Vet/Disability
Other similar jobs

ASIC Analog Design Engineer - REF79515L

@ Continental, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

ASIC Analog Design Engineer - REF79515L

@ Continental, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

Senior Engineer II - Analog Design

@ Alphawave Semi, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

ASIC Analog Design Engineer - REF79515L

@ Continental, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

Serdes PHY Analog Design Engineer

@ Qualcomm, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

Analog Design Engineer

@ Rambus, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

Principal Analog ASIC Designer

@ Tektronix, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

ASIC Analog Design Engineer - REF79515L

@ ContiTechMx, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

Staff Engineer, Analog Layout

@ Marvell Technology, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

Staff Engineer, Analog Layout

@ Marvell Technology, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

  • Employment

    โฑ๏ธŽ full-time

  • Experience

    ๐Ÿง™โ€โ™‚๏ธ junior

  • Salary

    ๐Ÿ’ฐ 100000

  • Skills
  • Industry
  • Find similar jobs

    ASIC Analog Design Engineer - REF79515L

    @ Continental, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    ASIC Analog Design Engineer - REF79515L

    @ Continental, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    Senior Engineer II - Analog Design

    @ Alphawave Semi, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    ASIC Analog Design Engineer - REF79515L

    @ Continental, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    Serdes PHY Analog Design Engineer

    @ Qualcomm, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    Analog Design Engineer

    @ Rambus, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    Principal Analog ASIC Designer

    @ Tektronix, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    ASIC Analog Design Engineer - REF79515L

    @ ContiTechMx, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    Staff Engineer, Analog Layout

    @ Marvell Technology, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    Staff Engineer, Analog Layout

    @ Marvell Technology, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

Remote Work
Post time
Level
Employment
Industry
Apply Now โ†—