Analog Design, Staff Engineer

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years deep in transistor-level design, building circuits that close timing, meet power budgets, and survive silicon. At Synopsys, you will work on SerDes PHY IP that ships in real products, with a team in Yerevan that takes this work seriously.

What You'll Be Doing

• Design and verify transistor-level analog and mixed-signal circuits for high-speed SerDes PHY IP, including transmitters, receivers, PLLs, DLLs, VCOs, equalizers, and bias circuits
• Develop circuit architectures and run tradeoff analysis across performance, power, noise, jitter, and reliability
• Execute DC, AC, transient, cross-corner PVT, aging, EMIR/SHE, and Monte Carlo simulations to validate robustness
• Build and validate circuit simulation models and Verilog-A behavioral models for IP integration
• Review custom layout implementations and collaborate with layout engineers to ensure post-layout performance meets spec
• Prepare technical documentation, lead design reviews, and present tradeoff decisions to cross-functional teams
• Mentor junior engineers and provide technical guidance on circuit design, simulation methodology, and debugging
  
  

The Impact You Will Have

• Your circuit architecture will define the performance envelope for SerDes PHY IP used in high-speed communication products
• Your simulation rigor will reduce post-silicon surprises and accelerate time to market
• The models you develop will enable system-level validation for customers, building next-generation AI and data center platforms
• Your layout reviews will catch issues that would otherwise surface in silicon, saving months of debug
  
  

What You'll Need

• BS or MS in Electrical Engineering or Electronics Engineering
• 4+ years of hands-on experience in analog and mixed-signal IC design in advanced CMOS technology nodes
• Deep expertise in transistor-level design, custom IC design flow, and layout effects including parasitics, matching, and proximity
• Proven experience designing and verifying transmitters, receivers, PLLs, DLLs, VCOs, equalizers, samplers, and reference circuits for high-speed SerDes or similar applications
• Strong simulation skills across DC/AC/Transient, cross-corner PVT, aging, EMIR/SHE, and Monte Carlo methods
• Experience developing circuit simulation models and Verilog-A behavioral models
• Proficiency with scripting using TCL, Python, Perl, MATLAB, or C.
• Experience with AI tools for design automation is a plus
  
  

Who You Are

• When post-layout results do not match schematic, you dig into the netlist and extraction deck to figure out what changed
• You know how to define a specification that is tight enough to matter but loose enough to close
• You translate between layout, verification, and digital teams without losing technical accuracy
• Junior engineers ask you questions because you explain the second-order effect they missed and care that they understand it
• You are fluent enough in English to present technical content and collaborate across a global team
  
  

The Team You'll Be Part Of

You will join the Cross-Functional Ultra-High-Speed R&D group in Yerevan, Armenia, a team focused on accelerating innovation in next-generation high-speed SerDes PHY development. This is a technical team working on real IP that ships in products, with collaboration across layout, verification, digital design, and silicon validation teams.

Rewards And Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.