ASIC Physical Design, Staff Engineer

ASIC Physical Design, Staff Engineer -10513

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

Strong desire to learn and explore new technologies. Demonstrates good analysis and problem-solving skills. Prior knowledge and experience in tools like DC, ICC2, PT-SI,FC is a definite advantage.

Should be a strong team player, excellent communicator as the role involves daily technical interaction with local, US counter parts.

What You’ll Be Doing:

• He/She will be part of SNPS DDR/HBM/Ucie IP implementation team and responsible for the implementation and integration of world class DDRs at the cutting-edge technology nodes.
• Timing closure above :4GHz, mixed signal had macro IP integration, Building the efficient clock trees with very tight skew balancing are some of the challenges as part of day-to-day job.
• Prior working knowledge in the DDR/HBM/HBI timing closure, implementation would be an added advantage.
• Should be very hands-on and able to technically lead a team of 4-6 junior engineers towards successful completion of project on-time and with top quality.
  
  

Who You Are:

• Typically requires a minimum of 6+ years of related experience after the post graduation.
• Possesses a full understanding of specialization area plus working knowledge of multiple related areas.
• A team player Independently resolves a wide range of issues in creative ways on a regular basis.
• Customarily exercises independent judgment in selecting methods and techniques to obtain solutions.
• Performs in project leadership role. Contributes to complex aspects of a project.
• Determines and develops approach to solutions.
• Work is independent and collaborative in nature.
• Provides regular updates to manager on project status.
• Represents the organization on business unit and/or company-wide projects. Guides more junior peers with aspects of their job.
  
  

The Team You’ll Be A Part Of:

The team focuses on enabling our Interface IP customers to integrate the IP into their SoC and assist them through their design flows, debugging critical issues, and supporting silicon bring-up. This collaborative team works closely with customers to ensure the successful deployment of Synopsys' leading Interface IP products in various market segments.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.