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Synopsys Inc

ASIC Physical Design, Sr Engineer

๐Ÿ“ŒYerevan, Armenia ๐Ÿ‡ฆ๐Ÿ‡ฒ

โฑ๏ธŽ full-time

๐Ÿง™โ€โ™‚๏ธ mid-level

A highly proficient engineer specializing in the physical implementation of ASICs, you bring strong expertise in transforming netlists into GDSII and performing thorough physical verification. With hands-on experience in building hard IP macros for leading-edge process nodes, you are adept at identifying and resolving verification issues.

In this role you will be responsible for digital implementation from RTL to GDSII, which includes the following stages:

  • Gate level netlist synthesis
  • Physical implementation
  • Static Timing Analysis
  • EMIR
  • Physical verification
  • Signoff

Key Qualifications

  • Requires a degree in Electrical or Computer Engineering with specialization in Micro-electronics (or equivalent)
  • 2+ years' work experience is required.
  • Possesses relevant experience in deep submicron CMOS technologies and ASIC digital implementation
  • Knowledge of the full design cycle from RTL to GDSII
  • Good software and scripting skills, version control, understanding of CAD automation methods.
  • Good written and verbal communication in English
  • Teamwork or Network relation experiences
  • Problem-solving and organizational skills
  • Academic and practical exposure in the following fields: high-speed design, low-power design, high-speed clock design and distribution, timing closure, signal integrity
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  • Employment

    โฑ๏ธŽ full-time

  • Experience

    ๐Ÿง™โ€โ™‚๏ธ mid-level

  • Skills
  • Industry
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