ASIC Digital Design Engineer, Architect
📌Bengaluru, India 🇮🇳
⏱︎ full-time
🧙♂️ senior
We have multiple openings for senior positions both at design and verification . We are looking for design and verification experts to work on implementation of design and verification of RTL based IP cores implementing complex protocols. The candidate (design/verification) will be part of the Solutions Group at our Bangalore Design Center, India and will be responsible for RTL design / functional verification solutions for the IP which is used in end-customer applications such as server farms, AI/machine learning, automotive, etc. The candidate will work with our internationally based team of architects/designers/other verification team members across multiple sites worldwide. The position offers learning and growth opportunities. This is a Senior Technical Individual Contributor role and offers challenges to work on technically challenging IP Cores.
Job Responsibilities And Key Qualifications For RTL Design
Job Responsibilities --
- Understand Standards / functional specifications for the product and write architecture / microarchitecture specifications
- Make architecture decisions on the design
- Implement RTL design and basic verification
- Work with the verification team to define the verification requirements
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Perform technical lead role
Must have BSEE in EE or MSEE with 20+ years of experience in the following areas:
- Knowledge of one or more of protocols DDR/PCIE/AMBA (AMBA2, AXI, CHI)/ SD/eMMC/ Ethernet/ USB/ MIPI
- Hands on experience with creating micro-architecture/ detailed design from Functional Specifications
- Hands on experience with Verilog/ System Verilog coding and Simulation tools
- Synthesis flow and static timing flows, Lint, CDC, Formal checking
- Prior experience with SVA and formal verification tools is an added advantage
- Knowledge of C/C++, TCL, Perl, Python is an added advantage
- Ability to work independently, precisely and to drive innovation
- Ability to extract detailed product requirements from high-level specification
- Good communication skills.
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Experience of working with Functional safety, ISO26262 , FMEDA is an added advantage
Job Responsibilities --
- Make architecture decisions on test bench design
- Write verification plans and specifications
- Implement test bench infrastructure and write test cases
- Implement a coverage driven methodology
-
Perform technical lead role
- Make architecture decisions on test bench design
- Write verification plans and specifications
- Implement test bench infrastructure and write test cases
- Implement a coverage driven methodology
-
Perform technical lead role
- Knowledge of one or more of protocols: DDR/PCIE/AMBA (AMBA2, AXI, CHI)/ SD/eMMC/ Ethernet/USB/ MIPI
- Hands on experience in creating Test Environment from Functional Specifications using UVM/VMM/OVM, Test Planning, Coverage closure, Assertion based verifications
- Proficient in SV and UVM, Object oriented coding and verification
- Able to provide verification solutions for productivity, performance and throughput improvement
- Knowledge of C/C++, TCL, Perl, Python is added advantage
- Ability to work independently, precisely and to drive innovation
- In addition, the candidate should have good communication skills, will be a team player and will have good problem solving skills.
- Experience of working with Functional safety, ISO26262 , FMEDA is an added advantage
Senior Embedded Software Engineer
@ Embedd 
What we're looking for
At embedd.it, we power hardware-software integration in embedded devices. We turn fragmented semiconductor chip data into configurable digital twins, then deterministically generate code, tests, and documentation – making integration faster, cheaper, and resilient to supply chain shocks.
We’re looking for a true legend – someone with abstract thinking and deep expertise in low-level software development. You’ll build vendor-agnostic tooling for MCU and peripheral integration to solve hardware-software integration once and for all. We work at the intersection of embedded systems, code generation, compilers, and machine learning. It’s your chance to help redefine how low-level development is done.
Responsibilities
- Drive the architecture of the driver structures and system layout
- Define scalable patterns for cross-architectural integration across bare-metal, Zephyr, Linux, and other environments
- Deconstruct complex SoC device trees and translate hardware descriptions into structured internal models for automated reasoning
- Partner with the ML team to shape data and annotation models for AI-driven data-extraction tooling
Qualifications
- 5+ years of experience in embedded systems development, including bare-metal and RTOS-based systems
- Proficiency in C/C++
- Familiarity with firmware configuration, SoC bring-up, and system-level debugging
- Hands-on experience with code generation tools, or low-level compiler/decompiler/emulator technologies
- Strong background in embedded toolchains: compilers, linkers, debuggers, and build systems
- Python or scripting for automation and tooling is a plus
- Experience with functional-safety standards is a plus
Why embedd.it?
- Dynamic, venture-backed team of engineers challenging the status quo 🚀
- Work at the intersection of embedded systems, code generators, compilers, and ML 🤖
- Unusual challenges requiring out-of-the-box abstract thinking 🧠
- Competitive compensation: cash + equity 💰
- Remote work possible 🌍
About Us
embedd.it is a UK-based startup reinventing embedded development. Our platform transforms unstructured semiconductor data into structured digital twins, enabling automatic generation of drivers, tests, and documentation. We're building a single, traceable source of truth to make integration fast, vendor-agnostic, and future-proof.
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Employment
⏱︎ full-time
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Experience
🧙♂️ senior
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Skills
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Industry
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