ASIC Chip Design Engineer
Mercor ↗
📍 Greater Montreal Metropolitan Area, Canada 🇨🇦
contract
senior
100
remote
Expired
Posted —
This job posting has expired
View All ASIC Design Engineer Jobs
Key Skills
ASICRTLPythonPowerSynthesis
Industry
SemiconductorConsumer Electronics
Job Description
About The Job
Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark , General Catalyst , Peter Thiel , Adam D'Angelo , Larry Summers , and Jack Dorsey .
Position: ASIC Power Engineer
Type: Contract
Compensation: $100–$135/hour
Location: Remote
Role Responsibilities
Must-Have
,
Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark , General Catalyst , Peter Thiel , Adam D'Angelo , Larry Summers , and Jack Dorsey .
Position: ASIC Power Engineer
Type: Contract
Compensation: $100–$135/hour
Location: Remote
Role Responsibilities
- Perform PPA optimization with Fusion compiler.
- Conduct RTL and netlist level power analysis.
- Execute post-processing and scripting on report log files for format conversion, data analysis, and information extraction.
- Setup, run, debug, and analyze reports of ASIC flows including Synthesis, PD, Power, and Timing.
- Implement blocks at RTL and UPF.
-
Document and communicate findings clearly.
Must-Have
- 10+ years of experience as an ASIC Power Engineer, or CAD Engineer/Physical Design Engineer.
- Experience with power estimation tools and synthesis, some physical design.
- Knowledge of power trade-offs in design and back end implementation.
- Hands-on experience in scripting, data analysis.
-
BS in Electrical Engineering/Computer Science or equivalent experience.
- Experience with Synopsys (DC, ICC, PTPX/PrimePower, VCS, Verdi) and/or Cadence (Joules).
- Python, Perl (or similar) scripting and data-post-processing tools.
- Excel (or Matlab) for model fitting, data visualization, and analysis.
- Experience in low power design, tools, and methodologies including power intent UPF specifications.
- Silicon Power Characterization.
-
Some power profiling experience at IP/SoC level.
- Upload resume
- AI interview based on your resume
-
Submit form
- For details about the interview process and platform information, please check: https://talent.docs.mercor.com/welcome/welcome
-
For any help or support, reach out to: [email protected]
,
Featured Opportunities
Key Skills
ASICRTLPythonPowerSynthesis
Industry
SemiconductorConsumer Electronics
Join the Live Jobs Feed
- Instant Telegram alerts for top jobs
- Organized by specialization and region
- Connect & chat with fellow engineers
Free forever • No spam • Leave anytime