Work closely with Analog Designers to iterate circuit layouts to achieve performance

Job Description

In your new role you will:

• Work closely with Analog Designers to iterate circuit layouts to achieve performance
• Perform critical circuit block, subsystem and top-level layout and verification using state-of-the art tools (Cadence Virtuoso--VXL) and techniques
• Participate in layout design of Analog circuits (block/IP/chip) floor planning from scratch, performing routing & layout verification and resolve violations
• Lead/co-lead the physical layout of IP of Analog layout design by working closely with cross functional team leader
• Conduct thorough layout design reviews internally & external review with circuit designers
• Plan overall project schedule and distribute tasks to project team members
• Capable in guiding/coaching junior engineers for on time delivery & quality
  
  

Your Profile

You are best equipped for this task if you have

• Bachelor's Degree in Electrical/Electronic Engineering/Microelectronic with VLSI exposure or equivalent 5 - 7 years of job experience in Analog Layout
• Knowledge & experience in Analog layout is mandatory
• Hands on experience in Analog layout from scratch
• Strong expertise in leading in one or more of the following IP Layouts
• LDO, ADC, DAC, PLL, VCO, Op-Amp
• Deep understanding of Analog circuit layout concepts in submicron CMOS technologies
• Expertise on matching, parasitic reduction, ESD, DFM etc.
• Possess strong technical, analytical & problem-solving skills in Analog layout design
• Capable in driving ideas towards implementation for layout productivity, quality and methodology improvement
• Ability to work as strong team player and participate in cross-functional activities
• Good interpersonal, verbal and communication skill with good initiative at work
  
  

#WeAreIn for driving decarbonization and digitalization.

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