SoC and IP Design Engineer

Altera 

📍 San Jose, United States 🇺🇸

full-time
senior
230400
Expired
Posted —
This job posting has expired View All SoC Design Engineer Jobs

Key Skills

RTLPCIeNetworkingSerdesASIC

Industry

SemiconductorTelecommunications

Job Description

Job Details

Job Description:

  • Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design.
  • Participates in the definition of architecture and microarchitecture features of the block being designed.
  • Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence.
  • Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
  • Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
  • Follows secure development practices to address the security threat model and security objects within the design.
  • Works with IP providers to integrate and validate IPs at the SoC level. Drives quality assurance compliance for smooth IP-SoC handoff.

Salary Range

Our compensation reflects the cost of labor within the US market. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.

$230.4k - $270.1k USD

Qualifications

  • BS in Electrical Engineering or equivalent
  • 15+ years of Hardware and Silicon Design, with a minimum of 5+ years of experience in as a technical leader
  • Experience in Networking, Serdes and PCIe - both from a design and architecture
  • Demonstrable experience working in a complex cross functional environment
  • Demonstrable experience in with many complex ASIC/SOC/FPGA

Job Type

Regular

Shift

Shift 1 (United States of America)

Primary Location:

San Jose, California, United States

Additional Locations:

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.