Job Description
You will work on physical design implementation of Optical Network ASICs and will be learning latest technology nodes and developing flow , doing implementation to achieve best in class ASICs , which are optimized for power, performance and area metrics
How You Will Contribute And What You Will Learn
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Working as independent contributor in development and verification of the world leading SoCs based on latest technology ASICs and FPGAs
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Working as independent contributor in algorithm development, fixed-point modelling and fixed-point performance verification
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Working with experts of different areas to ensure the most competitive solutions
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Cooperating with system engineers, HW/SW development, suppliers and other relevant functions to solve technical issues
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Supporting HW/SW bring-up and debug
Key Skills And Experience
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5+ years of experience in ASIC physical design flow and methodologies in 3/5 and 7nm process nodes
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Has solid knowledge of full design cycle from RTL to GDSII and understanding of underlaying concepts of IC design, implementation flows and methodologies for deep submicron design
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Experience with EDA Place & Route tools like Fusion Compiler or Innovus or similar tools and Timing tools like Primetime or similar
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Scripting experience in TCL, python or Perl
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Candidates must have a bachelor's degree or higher in Electrical/Electronics and Communication/VLSI/Microelectronics with very good academics