SoC Design Verification Engineer

Job Title: SoC Design Verification Engineer (2+ Years Experience)-10 Positions

Location: Bengaluru, India (Onsite)

Experience: 2+ Years

Employment Type: Full-Time / Contract

Job Summary

We are looking for a motivated and detail-oriented SoC Design Verification Engineer with 2+ years of experience in SoC verification. The candidate should have hands-on experience in building scalable verification environments and working on complex SoC-level verification using industry-standard methodologies.

Key Responsibilities

• Develop and execute verification plans for SoC designs
• Build and maintain UVM-based verification environments
• Write testcases, sequences, assertions, and coverage models
• Perform functional and code coverage analysis to ensure high-quality verification
• Debug and root-cause design and verification issues
• Work closely with design, architecture, and software teams for integration and validation
• Participate in design reviews and provide feedback from a verification perspective
• Support SoC integration and system-level validation

Required Skills & Qualifications

• 2+ years of experience in SoC Verification
• Strong knowledge of SystemVerilog and UVM methodology
• Experience in testbench development and debug
• Good understanding of digital design fundamentals
• Experience with industry-standard simulation tools such as:
• Synopsys VCS
• Cadence Xcelium
• Mentor QuestaSim
• Familiarity with protocols like AXI, AHB, APB, PCIe, or Ethernet
• Knowledge of coverage-driven verification (functional & code coverage)
• Exposure to assertion-based verification (SVA)

Preferred Qualifications

• Experience in SoC-level verification and integration
• Knowledge of scripting languages (Python/Shell/TCL)
• Basic understanding of C/C++ for embedded verification
• Experience with debug tools like Verdi or SimVision

If you think you are a match, please send your resumes to [email protected]