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SoC Chip Design Engineer for DFT/DFM

MediaTek ↗

📍 Hsinchu, Taiwan 🇹🇼

full-time

mid-level

Expired

Posted —

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Key Skills

DFTDFMSoCRTLATE

Industry

AutomotiveSemiconductor

Job Description

Job Description

We are seeking a highly skilled DFT/DFM Engineer to join our automotive ADAS SoC chip design team.

The successful candidate will be responsible for DFT and DFM methodologies, design, and implementation for our advanced automotive system-on-chip (SoC) designs.

The candidate will also collaborate with the design and layout teams to integrate DFT/DFM requirements.

SoC testing architecture design
Support project NPI(new product introduction) to MP(mass production) (test program development, coverage enhancement, yield improvement, cost reduction)
Cowork w/ IP, test engineer, process team, board design to fulfill CP/FT/SLT test requirement.

Requirement

Required Industry Experience

Minimum of 3+ years of proven experience in DFT/DFM, particularly in automotive ADAS SoC chip design .
Familiarity with automotive-specific quality and reliability standards, such as function safety ISO26262 and AEC-Q100.
Experience in (automotive) semiconductor manufacturing process, reliability, and yield improvement.

Key Technology Skills

Strong knowledge of SCAN, MBIST, BIST...DFT design structure and test coverage enhancement.
Strong knowledge of manufacture(DFM) yield improvement, test time reduction, test cost reduction.
Knowledge of SoC design tools and methodologies, including synthesis, static timing analysis, and formal verification.
Skilled in RTL coding and scripting languages, such as TCL/Perl/Python.

Nice To Have

Strong knowledge of automated testing equipment (ATE) and test program development.
Expertise in EDA tools for DFT analysis, such as Mentor Graphics Tessent or Synopsys DFTMAX, Tessent MBIST, automotive LBIST.
Expertise in ATPG pattern generation and coverage analysis, specifically for automotive SoC chip design.
Experience in high performance and low power design methodologies.