Senior Physical Design Engineer – ASIC / SoC

Frankfurt or Regensburg (Germany) | Permanent Position | Hybrid

Technology creates opportunities – people determine success.

We are currently looking for an experienced Senior Physical Design Engineer to join a leading semiconductor company and drive complex ASIC/SoC designs all the way to tape-out.

Your Responsibilities

• Own and execute the full Physical Design flo w (Floorplanning to GDSII)
• Perform Place & Route (PnR ) and drive timing closure
• Optimize Power, Performance, and Area (PPA)
• Conduct Static Timing Analysis (STA ) and sign-off activities)
• Collaborate closely with RTL Design, Verification, and Architecture teams

Your Profile

• Several years of experience i n ASIC / SoC Physical Design
• Strong hands-on experience wit h EDA too ls (e.g. Cadence Innovus, Synopsys ICC2)
• Proven experience i n timing closure, CTS, and sign-off
• Solid scripting skills (TCL, Python, or She ll)
• Experience wit h advanced technology nodes (e.g. 16nm, 7nm, 5nm, FinFET)
• Fluent in English

Important Requirement (Work Authorization)

We a re only considering candidates who already hold

• a val id EU work permit or
• an EU Blue Card