Senior ASIC Digital Engineer

Sandisk ↗

šŸ“ Bengaluru, India šŸ‡®šŸ‡³

full-time
senior
Posted —

Key Skills

UVMSystemVerilogPCIeARMI2C

Industry

SemiconductorConsumer Electronics

Job Description

Company Description

SandiskĀ understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.

SandiskĀ meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibilityĀ forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globallyĀ forĀ innovation, performance and quality.

SandiskĀ has two facilities recognized by the World EconomicĀ Forum as part of the Global Lighthouse NetworkĀ forĀ advanced 4IR innovations. These facilities were also recognized as Sustainability LighthousesĀ forĀ breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world movingĀ forward.

Job Description

SoC Verification Engineer

TheĀ SoC Development team at SandiskĀ is seeking highly motivatedĀ SoC Verification EngineersĀ to join our talented team, working on cutting-edgeĀ controller development for high-performance SoCsĀ used in industry-leading products.

Role & Responsibilities:

As aĀ SoC Verification Engineer, you will play a key role in ensuring the quality and reliability of our SoC designs. You will be responsible for:

  • DevelopingĀ verification test plansĀ based on design specifications.
  • Creating and executingĀ test cases across multiple platforms, includingĀ RTL simulation, FPGA prototyping, and Palladium emulation.
  • Verification test structures (DFx Verification)
  • PerformingĀ Gate-Level Simulations (GLS)Ā and debugging complex SoC designs.
  • Collaborating with design, architecture, and firmware teams to define verification strategies and driveĀ coverage-driven verification methodologies.
  • Contributing to the development of advancedĀ verification environments, including UVM, PSSĀ testbenches.
  • AnalyzingĀ functional coverage and simulation resultsĀ to enhance verification efficiency and effectiveness.
  • Generating Functional patterns required for Wafer Sorting.Ā 

    Why Join Us?

    AtĀ Sandisk, you’ll be part of a team of highly skilled engineers solving complex verification challenges and driving innovations inĀ data storage solutions. Your work will directly impact the performance and reliability of high-volume new age data solutions, consumer and enterprise products.

    Together, we’ll push the boundaries of technology, unlock the full potential of data, and shape the future of storage solutions

Qualifications

Required:

  • BEĀ or MS degreeĀ in Electrical/ElectronicsĀ Engineering or Computer Engineering, with 4-8Ā years of experience
  • Deep understanding of C, SystemVerilog UVM and coverage driven verification methodology
  • Working experience in Verifying Processor based SoC's (ARM, RISC-V, ARC)Ā 
  • Experience in DFX VerificationĀ 
  • Experience to generate functional patterns used for Post-Silicon testing.Ā Ā 
  • History of building and improving UVM based verification methodology

Skills:

  • Develop and execute verification plans
  • Proficiency with C, Verilog,Ā Ā System Verilog and UVM basedĀ verification
  • Knowledge in various interfaces –  Ā PCIe orĀ LPDDR,Ā UART, I2C, I2S, SPI
  • Experience working on processor-based SoC -- ARC/ARM/RISC..
  • Experience in implementing advanced test benches, verification models, scoreboards/checkers.
  • Knowledge in bus protocols -Ā AXI, AHB, APBĀ and bus interconnects
  • Experience with test plan creation and test-bench development
  • Experience with test development and test coverage assessment
  • Excellent debugging and problem-solving skill
  • Create and modify SoC-level, and sub-system level test benches.
  • Experience in setting up and running gate-level simulations
  • Gate Level / Power-Aware simulations
  • Great written and verbal communication skills
  • GoodĀ Programming/ScriptingĀ skills with languages such as Python, Perl, TCL, and BASH
  • Interest in ASICs, SoCs, flash memory, semiconductor components
  • Strong team player who can collaborate with colleagues

Additional Information

All your information will be kept confidential according to EEO guidelines.

  • Job Type (exemption status): Exempt position - Please see related compensation & benefits details below
  • Business Function: ASIC Development Engineering
  • Work Location: Bangalore PTP Office (IBP)--LOC_WDT_IBP