RTL/FPGA Engineer

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Cambridge Terahertz, based in Santa Clara, CA, is pioneering next-generation security with advanced Terahertz (THz) imaging technology, empowering safer communities through rapid, non-invasive weapons detection and threat screening. Our mission is to save lives by delivering breakthrough sensing solutions that uncover concealed threats—without health risks—enabling protection in airports, public venues, and critical infrastructure worldwide. Leveraging cutting-edge science spun out of MIT, our team is driven by a vision to transform security and safety with innovative platforms that truly make a difference, combining world-class engineering with a passion to solve society’s hardest challenges. Recently featured in CNBC, MIT News and Techcrunch, the company is backed by top-tier investors and five government contracts. Our world-class team includes some of the best minds in RF, THz and hardware, and is passionate about taking on the most difficult technical challenges. We foster a creative, fast-paced, and values-driven culture that nurtures self-growth and learning, and using technology to enrich lives.

RTL/FPGA Engineer (Contract ~3 months)

Santa Clara, CA | Hybrid

We’re looking for an RTL/FPGA Engineer with systems experience to help bring up and validate the FPGA systems underpinning our real-time imaging platform. Primarily working in Verilog on an AMD Kria system, You’ll work to bring up interfaces to components such as RFDACs and ADCs and interfaces such as LVDS and PCIe in a timing-constrained and resource-constrained platform. You'll be hands-on at the intersection of hardware, RTL, and software - connecting components into a unified system. This is an intense, fast-paced three-month contract role with potential to convert to a full-time position.

Key Responsibilities

• Design, implement, and verify RTL for FPGA-based systems, targeting high-performance computation and real-time data processing.
• Architect and implement robust interfaces to external components such as ADCs, DACs, memory, and high-speed serial links using interfaces such as LVDS and PCIe.
• Collaborate with cross-functional teams to define system architecture, data flows, and integration requirements.
• Participate in hardware bring-up, debugging, and validation using lab equipment (oscilloscopes, logic analyzers, etc.).
• Document designs, test procedures, and results; support transition to production and manufacturing.
• Contribute to a creative, fast-paced, and values-driven culture that encourages self-growth and technical excellence.

Job Requirements (must have)

• 5+ years of experience designing and implementing RTL for Xilinx/AMD FPGA platforms,
• Proficiency in Verilog and/or System Verilog, with a track record of successful FPGA deployments.
• Demonstrated experience interfacing FPGAs with high-speed external components (e.g., ADCs, DACs, DDR/SDRAM, PCIe, Ethernet).
• Familiarity with FPGA toolchains (Vivado, Quartus, ModelSim, etc.) and simulation/verification methodologies.
• Experience with hardware debugging, lab bring-up, and use of measurement equipment.
• Strong communication and team collaboration skills.
• Ability to work independently in a fast-paced startup environment.

Also Desired (optional)

• Direct experience with AMD Kria or RFSoC/MPSoC platforms with Petalinux or Yoctolinux.
• Knowledge of THz, radar, lidar, or imaging sensor systems.

Benefits, Details

• Fast-paced, high-impact environment with top-tier peers.
• Opportunity to work at the bleeding edge of wireless and imaging silicon technology.
• Duration: ~3 months full-time contract, with potential for full-time employee conversion.
• Location: Santa Clara, CA (hybrid — not every day on-site).
• Compensation: Competitive, commensurate with experience.

Cambridge Terahertz is an Equal Employment Opportunity (EEO) employer. All qualified applicants will receive consideration for employment and will not be discriminated against on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, age, veteran status, disability status, or genetic information.