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ChipSilica

RTL Design Lead

ChipSilica

📍 Greater Bengaluru Area, India 🇮🇳

full-time
senior
on-site
Posted —

Key Skills

RTLSoCPCIeIPintegration

Industry

SemiconductorTelecommunications

Job Description

We are looking for an experienced and highly hands-on RTL Design Lead to join our growing semiconductor team. This role is ideal for someone who enjoys deep technical ownership, active coding, and leading teams through complex design challenges.


  • Role : RTL Design Lead
  • Experience : 7-15+ years
  • Location : Bangalore (On-site)
  • Joining : Immediate to 15 days only
  • Number of Positions: 3


If you're passionate about building cutting-edge High-Speed Interface solutions, this is an opportunity to work on:

  • High-Speed Interface IP Development (PCIe Gen 6/7/8, UCIe 2, DDR4/5, CXL 3/2)
  • SoC Integration of High-Speed Interface IPs
  • High-Speed Interface Subsystem Design & Integration
  • In-depth packet and data flow of SoCs and subsystems, not just regression running
  • Hands-on integration, customization and feature addition developments


Key Responsibilities


  • Lead RTL design and development for complex IP/SoC blocks
  • Drive architecture understanding, micro-architecture implementation, and design quality
  • Perform hands-on RTL coding and actively contribute to critical design deliverables
  • Guide and mentor design engineers while ensuring technical excellence and timely execution
  • Collaborate closely with verification, integration, and system teams throughout the development cycle
  • Support design reviews, debugging, and closure activities


Mandatory Skills:


Strong RTL Design experience - Must be Hands-on

Hands-on expertise in High-Speed Interface protocols (PCIe preferred)


If you're looking to work on challenging IP and subsystem development projects in the high-speed connectivity domain, we'd love to hear from you.