RTL Design Engineer
Source-Right ↗
📍 Bengaluru, India 🇮🇳
full-time
mid-level
Expired
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Key Skills
RTLVerilogSystemPCIeEthernet
Industry
SemiconductorTelecommunications
Job Description
Position: RTL Design (SI510FT RM 3851)
Job Description
Experience range: 5-10 years
Job Description
Experience range: 5-10 years
- RTL design (Verilog/System Verilog) for SoC and subsystems, IP.
- Experience in Clock domain crossing handling designs and its qualifications.
- Experience in SoC boot, reset, initialization controllers and integration of peripherals.
- Experience with PCIe Gen5/6, LPDDR4/5, USB 3/4 and Ethernet is a plus.
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Key Skills
RTLVerilogSystemPCIeEthernet
Industry
SemiconductorTelecommunications
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