RTL Design Engineer

Company Description BITSILICA is a global semiconductor design services company providing end-to-end Concept-to-Silicon-to-Software solutions for leading semiconductor clients. With an engineering team of over 500 professionals across India, Singapore, the USA, Malaysia, and Vietnam, the company focuses on advanced semiconductor and embedded software innovations. Its pre-silicon expertise spans low-power design, IP/Subsystem/SoC design and integration, functional and power-aware verification, DFT, and physical design with STA. BITSILICA works on complex technologies, including high-speed interfaces, modern processors, and SoCs for IoT, mobile, 5G, compute, and AI applications. The company also delivers embedded software services such as Linux kernel and driver development, firmware, BSPs, and bootloaders for domains like multimedia, automotive, and advanced modem technologies.
Role Description This is a full-time, on-site RTL Design Engineer role based in Bengaluru. The RTL Design Engineer will be responsible for translating micro-architecture specifications into synthesizable RTL, ensuring design correctness, quality, and performance. Day-to-day tasks include writing and refining RTL code, collaborating with architecture and verification teams, supporting integration and synthesis, and assisting with timing closure and low-power implementation. The role also involves debugging functional issues, reviewing design and verification plans, contributing to documentation, and participating in design reviews. The engineer will work closely with cross-functional teams to deliver robust IP, subsystems, and SoC components for complex semiconductor products.
Qualifications

• Strong foundation in Design Engineering with experience in digital/RTL design, micro-architecture understanding, and SoC/IP development.
• Relevant background in Electrical Engineering or Electronics Engineering, with knowledge of digital logic, VLSI concepts, and semiconductor fundamentals.
• Exposure to Computer-Aided Design (CAD) tools for synthesis, static timing analysis, linting, and formal checks used in ASIC/FPGA flows.
• Experience or understanding of Product Design concepts in semiconductor or embedded systems, including performance, power, and area trade-offs.
• Bachelor’s or Master’s degree in Electronics, Electrical, Computer Engineering, or a related technical field.
• Proficiency in RTL design languages (such as Verilog/SystemVerilog or VHDL) and familiarity with simulation and debugging tools.
• Good problem-solving skills, attention to detail, and the ability to work collaboratively in cross-functional engineering teams.
• Experience with interfaces (e.g., PCIe, DDR, Ethernet) or processor-based subsystems, and knowledge of low-power design techniques is an advantage.