Lead Analog Design Engineer

Cadence System Design And Analysis 

📍 New Delhi, India 🇮🇳

full-time
senior
Expired
Posted —
This job posting has expired View All Analog Design Engineer Jobs

Key Skills

CMOSSERDESPLLsimulationverification

Industry

SemiconductorConsumer Electronics

Job Description

he Lead Analog Design Engineer will take a Key role on the Analog and Mixed signal design team as part of a Die to Die Product Development Team.

Exp- 2- 7 Yrs

Job Responsibilities:

  • Design of High Speed D2D and SERDES products at industry standard data rates up on leading edge technology nodes (e.g. 3nm FinFET CMOS)
  • Design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications
  • Work closely with Layout Design Engineers to design IC circuit blocks and PMA sections
  • Work with Technical Team Leads in the areas of circuit design and SERDES architectures
  • Work with global teams (US, west coast and east coast), which work in different time-zones


Job Qualifications:

  • BEng, MEng, PhD or equivalent.
  • Candidate’s background should include a minimum of 5 years of CMOS design experience, preferably in the area of CMOS SERDES or high-speed I/O IC design
  • Should have a good understanding of jitter and signal equalization techniques
  • Design experience in some of the following SERDES circuit blocks: Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, Bias and Bandgap, Voltage Regulators
  • Excellent problem-solving skills, analog aptitude, good communication skills and ability to work cooperatively in a team environment
  • Position requires proficiency in using CAD tools for circuit simulation, layout and physical verification


Additional Skills/Preferences:

  • Cadence tool experience is desirable and design experience at >10Gbps and in <16nm technologies
  • Lab test experience as part of silicon evaluation is advantageous