Resquant is a rapidly growing deep-tech startup focused on next-generation chip security and quantum-resistant cryptography solutions for dual-use and high-security applications. We develop advanced hardware security technologies designed to address emerging threats in post-quantum computing environments, working at the intersection of cryptography, semiconductor engineering, and secure system architecture.
We are building a team of highly skilled engineers passionate about cutting-edge FPGA and ASIC development, secure hardware design, and innovative defense-grade technologies.
Position: FPGA Verification Engineer (multiple)
Compensation:
22,000–29,000 PLN gross/month
Employment type: Polish employment contract (Umowa o Pracę / UoP) only; B2B cooperation is not available.
Resquant is looking for highly skilled FPGA Verification Engineers for various positions. This is a great opportunity to join a rapidly growing startup at an early stage, working on the latest trends in chip security and cryptography.
Main responsibilities:
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Developing and maintaining verification plans based on design specifications at the block and subsystem level for quantum-resistant cryptographic algorithms and cryptographic processors.
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Designing and implementing reusable, modular testbenches using VHDL, Verilog, and SystemVerilog.
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Building simulation environments to verify complex FPGA and digital IPs.
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Debugging and resolving design and verification issues in collaboration with design engineers.
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Performing functional and code coverage analysis to ensure verification completeness.
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Maintaining verification documentation including test plans, coverage reports, test case specifications, and bug tracking logs.
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Cooperation with ASIC backend team.
Our requirements:
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Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, or a related field.
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5+ years (Mid-level) or 8+ years (Senior-level) of hands-on experience in FPGA verification and development.
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Proficiency in VHDL, Verilog, or SystemVerilog for RTL verification.
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Knowledge of the ASIC design process.
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Experience with VUnit, cocotb, or UVM.
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Ability to work independently or strong cooperation skills to work within a cross-functional team.
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Strong problem-solving and analytical thinking skills.
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EU citizenship.
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Candidates must be eligible for employment under a Polish employment contract (UoP).
Preferred candidates with:
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Knowledge in the field of cryptography.
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Experience with side-channel attacks and countermeasures.
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Experience with space technologies and requirements.
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EU/NATO security clearance.
What do we offer:
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Full-time Senior and Mid-level positions in a 3-year project.
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Salary range: 22,000–29,000 PLN gross/month depending on experience and seniority.
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Employment exclusively under an employment contract (UoP). B2B cooperation is not available.
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Participation in projects aimed at providing a backbone for chip security for dual-use markets.
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Flexible working hours.
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Ability to work remotely (Hybrid/Full).
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Equity options.
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Broad technical ownership.
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Innovation and cutting-edge projects.
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Career growth and visibility.
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Opportunity to attend closed events with military representatives.