FPGA RTL-HDL Design Engineer

JD- FPGA RTL-HDL Design Engineer

Company Description

Our diverse expertise in Predictive Maintenance and Condition Monitoring helps industries reduce downtime, improve reliability, and cut maintenance costs through advanced techniques such as Vibration Analysis, Thermography, Dynamic Balancing, and Power Quality Analysis. For more details, visit: www.sensovibe.in

Role Overview

This role is focused on FPGA-based data acquisition and RTL design for multi channel, high-speed signal systems. The candidate will be responsible for developing and optimizing FPGA logic for reliable, real-time data capture and processing.

Key Responsibilities

 Design and develop RTL (Verilog/VHDL) for FPGA-based systems

 Interface high-speed ADCs (such as AD7768 or similar) with FPGA

 Implement data acquisition pipelines, buffering (FIFO), and streaming architectures

 Work on multi-channel synchronized data capture

 Handle timing constraints, clock domain crossing, and latency optimization

 Integrate FPGA with processor systems (AXI, DMA, or equivalent interfaces)

 Perform hardware debugging using tools like ILA / logic analyzer

 Support system-level testing and validation in real operating conditions Required Skills

 2–3 years of hands-on experience in FPGA design and RTL development

 Strong knowledge of Verilog or VHDL

 Understanding of digital design concepts:

o State machines

o Pipelining

o Timing analysis

 Experience with communication interfaces:

o SPI / I2C / UART / Parallel interfaces

 Exposure to FPGA development tools (Xilinx Vivado or equivalent)

 Basic understanding of high-speed data handling and synchronization Preferred Skills

 Experience with ADC interfacing and data acquisition systems

 Knowledge of AXI protocol, DMA, or processor-FPGA integration

 Familiarity with signal processing basics (sampling, filtering, FFT)

 Exposure to embedded systems or industrial applications Candidate Profile

 Strong problem-solving approach with focus on practical implementation

 Ability to debug hardware-level issues and optimize performance

 Comfortable working on real product development, not only simulations

 Willingness to work on industrial applications and system-level challenges Location Pune (with occasional on-site support if required)