FPGA Engineer

MUST BE A US CITIZEN (ITAR REQUIREMENT).

Support a Fortune 500 Aero-Defense Company as a FPGA Engineer.

MUST HAVE AN ACTIVE SECRET CLEARANCE.

What You Will Do

• Adhere to all applicable Engineering Development and Quality processes, procedures, instructions and guidelines.

• Participate in Agile team meetings and planning activities, as required to support programs covered by this work plan.

• Requirements, design and verification of FPGA solutions

• Integration of developed FPGA on target hardware units

• Supporting peer reviews and certification analysis activities

• Peer reviewing FPGA development artifacts

• Management of change request and task assignments through Jira

Qualifications You Must Have

• Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience.

• An active U.S. government issued Final Secret Security Clearance is required

• A minimum of 3 years professional experience in FPGA development, ASIC front end, or related areas

• Proficient in VHDL/Verilog for FPGA/ASIC design and implementation.

• Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure

• Familiarity with FPGA platforms such as AMD/Xilinx, Altera, Microchip, or others, and associated toolchains (e.g., Vivado, Quartus, Libero).

• Strong debugging and troubleshooting skills for FPGA/ASIC systems.

• Proficiency with revision control concepts and tools (e.g., Git, Subversion)