Welcome to Codasip

We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance , and energy-efficient CPU cores from scratch, and our own automated proprietary tools to fully customize them. We give our customers a unique competitive advantage by empowering their system-on-chip developers to build the most innovative products.

Our processor cores are based on the RISC- V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approac h: our unique architecture description language, CodA L, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions .

Founded in 201 4, we've grown into a thriving and talented global community. Ou r I P engineering teams work from offices spread acros s Euro pe, including our first and largest design center in the beautiful city o f Br no, Czechia. Acros s Euro pe, we already have design teams i n Cambridge, Bristol, Munich, Villeneuve-Loubet, Barcelona, Thessaloniki, Heraklion and Athen s. The Codasip team is also based close to its customers, which means we have dedicated sales and application engineers in the USA, Japan, Korea, and China.

Codasip is a private company backed by well-funded EU gra nts. Our products are already making a real impact, with billions of devices already in the market powered by o ur processor IP and tools.

What you'll do Codasip is exploring and prototyping the implementation of RISC-V Vector extension for Codasip RISC-V CPU cores. As this transitions to commercialization, you will work within our Studio Compiler team to ensure our highly automated design tools have the necessary and comprehensive features for designing customizable vector architectures, alongside wider hardware extensions.

You will:

• Customize and optimize LLVM to support Codasip’s standard and customized embedded RISC-V CPU cores with in-pipeline and co-processor vector units
• Enhance the compiler to work with standard and customized hardware extensions and completely new processor architectures developed using our Studio EDA tool
• Improve the tool’s automatically generated LLVM-based C/C++ compiler
• Contribute expert advice to both internal and external customers to develop capabilities, skills and processes
• Support the Embedded Software and Processor Design teams with compiler expertise to help optimize software and guide microarchitecture design
• Explore compiler technology to support novel compute architectures and technologies
• Work on both short-term customer-driven projects as well as longer-term strategic Codasip software products
• Collaborate with the wider industry, open source community and academia to drive compiler adoption and future enhancements.
• Explore further applications of this work e.g. AI/ML

What you need:

• In-depth knowledge of and experience developing compilers (architecture-specific e.g. new instructions, scheduling, optimizations) - preferably LLVM
• Strong C++ programming skills
• A flexible and adaptable attitude to work
• A desire to learn and also positively influence the technical development of others
• Lateral thinking and problem-solving skills

What we'd love you t o have:

• Knowledge of Vector processing architectures (Scalable vectors and/or SIMD) and techniques, with experience in implementing and tuning/optimizing vector code
• Experience with RISC-V technologies
• The ability to communicate effectively at both the technical and management level
• An interest in AI/ML and/ or MLIR

• Carl Shaw – What is CHERI and why is it necessary?
• Codasip RISC V Processor Solutions
• Design for differentiation: architecture licenses in RISC‑V
• Scaling is Failing - Dr. Ron Black, CEO, Codasip
• Codasip Labs to accelerate advanced technologies