Analog Design Engineer

The Group

The Joint Development Team (JDT) is a small, independent, cross-disciplinary group whose charter is to accelerate the development of key components, systems, algorithms, and techniques necessary to advance the state of the art in targeted areas and to collaborate with focused product development teams to get these advances to the marketplace. Current and future research areas include advanced medical devices, energy metering and fault detection, high-speed imaging, security electronics, ultra-precision references and data converters.

The group is led by Analog Devices Fellow JED Hurwitz, a pioneer in CMOS imaging, recognized expert in ultra-high precision, and of broad industrial experience. The group culture aims to foster a challenging, exciting, and supportive environment.

The team members must be comfortable working on a wide variety of products and technologies in a fast-paced and agile environment and will be exposed to various groups across the corporation’s many sites through all stages of the development cycle.

The Role

The exact role and responsibilities of the engineer will be determined by the project’s requirements and the candidate’s skillset. The P4 Analog Design Engineer will independently design and verify advanced analog and mixed-signal blocks used across JDT’s research and product development programs. This role involves full ownership of blocks and subsystems, mentoring junior engineers, and driving architectural, methodological, and verification improvements.

Essential Duties and Responsibilities:

• Own transistor‑level design of analog and mixed‑signal blocks (e.g., amplifiers, references, ADC/DAC front‑ends, bias circuits, oscillators, regulators).
• Perform analysis, modeling, architecture definition, schematic design, simulation, corner analysis, and layout interaction.
• Lead design reviews, verification reviews, and silicon correlation activities.
• Support layout, test, validation, lab debug, measurement correlation, data review, and documentation for first‑silicon bring‑up
• Develop design methodologies, modeling techniques, and evaluation infrastructures.
• Collaborate closely with digital, verification, systems, test, and applications teams.
• Mentor and guide P1–P3 analog engineers.
• Work well on a multi-site team in a flexible and dynamic work environment

Minimum Qualifications :

• BS or MS in ECE, EE, or equivalent.
• 5–10 years of experience in analog/mixed‑signal IC design.
• Strong circuit design expertise in CMOS; experience with ADCs, DACs, bandgaps, bias, LDOs, drivers, sampled‑data circuits, and switched‑capacitor circuits is a plus.
• Strong communication and documentation skills
• Proficiency in Cadence Virtuoso, Spectre, analog behavioral modeling (Verilog‑A), and lab evaluation.